Integration Guide

Enfora Enabler III LPP
Integration Guide Page 26 Revision: 0.00
5.4.8 SERIAL INTERFACES
5.4.8.1 MAIN SERIAL INTERFACE (PINS 17, 18)
The pin naming for TX/RX is referenced as a DTE. The DTE device should match
their input pins to the Enfora outputs and vice-versa. Module is on 2.2 V logic
levels, so appropriate level translation needs to be accounted for.
9 way D Connector
Pin Number
Signal
Signal
Direction
Enfora Pin
Number
Enfora Module
Signal Direction
1 N/A
2 Receive Data (RD) from DCE 17 Output
3 Transmit Data (TD) from DTE 18 Input
4 N/A
5 Signal Ground both
6 N/A
7 N/A
8 N/A
9 N/A
The key features of the UART in the Enabler III LPP module mode are as follows:
• 16C550 compatibility
• Baud rate 115200 Kbits/s
• Data format:
• Data bit: 8 bits
• Parity bit: none
• Stop bit: 1bit
• Flow Control: None
5.4.8.2 GPS SERIAL INTERFACE (PIN 19)
It is optional as to whether something should be connected to the RS232 GPS
DEBUG OUT. If streaming NMEA messages are needed for external processing,
above and beyond the NMEA sent to the server, then a serial cable can be
connected between this serial connector and a PC. The baud rate is fixed at
57600.
9 way D Connector
Pin Number
Signal
Enfora Pin
Number
Enfora Module Signal
Direction
1 N/A
2 Receive Data (RD) 19 Output
3 N/A
4
N/A
5 Signal Ground
6 N/A
7 N/A
8 N/A
9 N/A