MVME3100 Single-Board Computer Installation and Use V3100A/IH1 January 2006 Edition
© Copyright 2006 Motorola Inc. All rights reserved. Printed in the United States of America. Motorola and the stylized M logo are trademarks of Motorola, Inc., registered in the U.S. Patent and Trademark Office. All other product or service names mentioned in this document are the property of their respective owners.
Safety Summary The following general safety precautions must be observed during all phases of operation, service, and repair of this equipment. Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment. The safety precautions listed below represent warnings of certain dangers of which Motorola is aware.
Flammability All Motorola PWBs (printed wiring boards) are manufactured with a flammability rating of 94V-0 by UL-recognized manufacturers. EMI Caution Caution ! Caution This equipment generates, uses and can radiate electromagnetic energy. It may cause or be susceptible to electromagnetic interference (EMI) if not installed and used with adequate EMI protection. Lithium Battery Caution This product contains a lithium battery to power the clock and calendar circuitry.
CE Notice (European Community) Warning ! Warning This is a Class A product. In a domestic environment, this product may cause radio interference, in which case the user may be required to take adequate measures. Motorola products with the CE marking comply with the EMC Directive (89/336/EEC).
Notice While reasonable efforts have been made to assure the accuracy of this document, Motorola, Inc. assumes no liability resulting from any omissions in this document, or from the use of the information obtained therein. Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes.
Contents About This Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xv Overview of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xv Comments and Suggestions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xvi Conventions Used in This Manual . . . . . . . . . . . . . . . . .
Contents Command Line Rules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MOTLoad Command List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Default VME Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Firmware Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Contents Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PMC Expansion Connector (J4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ethernet Connectors (GENET1/J41B, GENET2/J2B, ENET1/J2A) . . . . . . . . . . . . . . . . . . . . . . PCI Mezzanine Card (PMC) Connectors (J11 – J14, J21 – J23) . . . . . . . . . . . . . . . . . . . . . . . .
List of Figures Figure 1-1. MVME3100 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 4-1. MVME3100 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 4-2. MVME721 RTM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of Tables Table 1-1. Startup Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Table 1-2. Configuration Switch (S4) Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 1-3. Geographical Address Switch Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 1-4. Slot Geographical Address Settings . . . . . . . . . . . . . . . . . . . . . . . . .
About This Manual The MVME3100 Single-Board Computer Installation and Use manual provides the information you will need to install and configure your MVME3100 single-board computer and MVME721 rear transition module (RTM). It provides specific preparation and installation information, and data applicable to the board. As of the printing date of this manual, the MVME3100 supports the models listed below.
About This Manual Comments and Suggestions Motorola welcomes and appreciates your comments on its documentation. We want to know what you think about our manuals and how we can make them better. Mail comments to: Motorola, Inc. Embedded Communications Computing Reader Comments DW278 2900 S. Diablo Way Tempe, Arizona 85282 You can also submit comments to the following e-mail address: reader-comments@mcg.mot.com In all your correspondence, please list your name, position, and company.
1 Hardware Preparation and Installation 1 Introduction This chapter contains the following information: ■ Board preparation and installation instructions ■ ESD precautionary notes Description The MVME3100 is a single-slot, single-board computer based on the MPC8540 PowerQUICC III™ integrated processor. The MVME3100 provides serial ATA (sATA), USB 2.0, 2eSST VMEbus interfaces, dual 64-bit/100 MHz PMC sites, up to 128MB of Flash, dual 10/100/1000 Ethernet, one 10/100 Ethernet, and five serial ports.
Chapter 1 Hardware Preparation and Installation Overview of Startup Procedures The following table lists the things you will need to do before you can use this board and tells where to find the information you need to perform each step. Be sure to read this entire chapter, including all Caution and Warning notes, before you begin. Table 1-1. Startup Overview What you need to do... Refer to... Unpack the hardware. Unpacking Guidelines on page 2 Identify various components on the board.
Chapter 1 Hardware Preparation and Installation Warning Dangerous voltages, capable of causing death, are present in this equipment. Use extreme caution when handling, testing, and adjusting. Warning Hardware Configuration This section discusses certain hardware and software tasks that may need to be performed prior to installing the board in a chassis.
Chapter 1 Hardware Preparation and Installation The MVME3100 is factory tested and shipped with the configuration described in the following sections. Figure 1-1.
Chapter 1 Hardware Preparation and Installation Configuration Switch (S4) An 8-position SMT configuration switch controls the VME SCON setting, Flash bank writeprotect, and the safe start ENV settings. It also selects the Flash boot image. The default setting on all switch positions is OFF. Table 1-2. Configuration Switch (S4) Settings Setting Switch Pos. OFF (Factory Default) ON Notes SAFE_START 1 Normal ENV settings should be used. Safe ENV settings should be used.
Chapter 1 Hardware Preparation and Installation Geographical Address Switch (S3) The TSi148 VMEbus Status register provides the VMEbus geographical address of the MVME3100. This switch reflects the inverted states of the geographical address signals. Applications not using the 5-row backplane can use the geographical address switch to assign a geographical address.
Chapter 1 Hardware Preparation and Installation Table 1-4.
Chapter 1 Hardware Preparation and Installation Table 1-6. EEPROM Address Settings Device Address A(2:0) SW1 SW2 SW3 $A0 000 ON ON ON $A2 001 OFF ON ON $A4 010 ON OFF ON $A6 011 OFF OFF ON $A8 100 ON ON OFF $AA (Factory) 101 OFF ON OFF $AC 110 ON OFF OFF $AE 111 OFF OFF OFF Note The RTM EEPROM address switches must be set for address $AA in order for this device to be accessible by MotLoad.
Chapter 1 Hardware Preparation and Installation To remove the board from the chassis, press the red locking tabs (IEEE handles only) and reverse the procedure. Connection to Peripherals When the MVME3100 is installed in a chassis, you are ready to connect peripherals and apply power to the board. Figure 1-1 on page 4 shows the locations of the various connectors while Table 1-7 and Table 1-8 list them for you. Refer to Chapter 5, Pin Assignments for the pin assignments of the connectors listed below.
Chapter 1 Hardware Preparation and Installation Completing the Installation Verify that hardware is installed and the power/peripheral cables connected are appropriate for your system configuration. Replace the chassis or system cover, reconnect the system to the AC or DC power source, and turn the equipment power on.
2 Startup and Operation 2 Introduction This chapter gives you information about the: ■ Power-up procedure ■ Runtime switches and indicators Applying Power After you verify that all necessary hardware preparation is complete and all connections are made correctly, you can apply power to the system.
Chapter 2 Startup and Operation Table 2-1. Front-Panel LED Status Indicators (continued) Function Label Color Description GENET 1 Link / Speed SPEED Off No link Yellow 10/100Base-T operation Green 1000Base-T operation Blinking Green Activity proportional to bandwidth utilization. Off No activity GENET 1 Activity ACT The MVME721 rear transition module also has four status indicators. The following table describes these indicators: Table 2-2.
Chapter 2 Startup and Operation Table 2-3. Additional Onboard Status Indicators (continued) Function Label Color Description sATA 1 Activity DS5 (silkscreen) Green No function in legacy mode (default). sATA 1 activity in DPA mode. MPC8540 Ready DS3 (silkscreen) Green Indicates that the MPC8540 has completed the reset operation and is not in a power-down state.
3 MOTLoad Firmware 3 Introduction This chapter describes the basic features of the MOTLoad firmware product, designed by Motorola as the next generation initialization, debugger, and diagnostic tool for highperformance embedded board products using state-of-the-art system memory controllers and bridge chips, such as the MPC8540 processor.
Chapter 3 MOTLoad Firmware MOTLoad Utility Applications The definition of a MOTLoad utility application is very broad. Simply stated, it is considered a MOTLoad command, if it is not a MOTLoad test. Typically, MOTLoad utility applications are applications that aid the user in some way (that is, they do something useful). From the perspective of MOTLoad, examples of utility applications are: configuration, data/status displays, data manipulation, help routines, data/status monitors, etc.
Chapter 3 MOTLoad Firmware Test results and test status are obtained through the testStatus, errorDisplay, and taskActive commands. Refer to the appropriate command description page in the MOTLoad Firmware Package User’s Manual for more information. Using MOTLoad Interaction with MOTLoad is performed via a command line interface through a serial port on the SBC, which is connected to a terminal or terminal emulator (for example, Window’s Hypercomm).
Chapter 3 MOTLoad Firmware Copyright: Motorola Inc.1999-2005, All Rights Reserved MOTLoad RTOS Version 2.0, PAL Version 1.0 RM01 Mon Aug 29 15:24:13 MST 2005 MVME3100> If the partial command string cannot be resolved to a single unique command, MOTLoad informs the user that the command was ambiguous. Example: MVME3100> te "te" ambiguous MVME3100> Command Line Help Each MOTLoad firmware package has an extensive, product-specific help facility that can be accessed through the help command.
Chapter 3 MOTLoad Firmware ■ The argument/option identifier character is always preceded by a hyphen (-) character ■ Options are identified by a single character ■ Option arguments immediately follow (no spaces) the option ■ All commands, command options, and device tree strings are case sensitive Example: MVME3100> flashProgram –d/dev/flash0 –n00100000 For more information on MOTLoad operation and function, refer to the MOTLoad Firmware Package User’s Manual.
Chapter 3 MOTLoad Firmware Table 3-1.
Chapter 3 MOTLoad Firmware Table 3-1.
Chapter 3 MOTLoad Firmware Table 3-1.
Chapter 3 MOTLoad Firmware Default VME Settings As shipped from the factory, the MVME3100 has the following VME configuration programmed via Global Environment Variables (GEVs) for the Tsi148 VME controller. The firmware allows certain VME settings to be changed in order for the user to customize the environment. The following is a description of the default VME settings that are changeable by the user.
Chapter 3 MOTLoad Firmware Inbound window 0 (ITAT0) is not enabled; Virtual FIFO at 256 bytes, 2eSST timing at SST320, respond to 2eSST, 2eVME, MBLT, and BLT cycles, A32 address space, respond to Supervisor, User, Program, and Data cycles. Image maps from 0x00000000 to 0x1FFF0000 on the VMbus, translates 1x1 to the PCI-X bus (thus 1x1 to local memory). To enable this window, set bit 31 of ITAT0 to 1.
Chapter 3 MOTLoad Firmware Outbound Image Outbound Image Outbound Image Outbound Image Outbound Image MVME3100> 3 3 3 3 3 Ending Address Upper Register = 00000000 Ending Address Lower Register = B3FF0000 Translation Offset Upper Register = 00000000 Translation Offset Lower Register = 4C000000 2eSST Broadcast Select Register = 00000000 Outbound window 3 (OTAT3) is enabled, 2eSST timing at SST320, transfer mode of SCT, A16/D32 Supervisory access.
Chapter 3 MOTLoad Firmware ■ To display selected Inbound Window state vmeCfg –s –i(0 - 7) ■ To display selected Outbound Window state vmeCfg –s –o(0 - 7) ■ To display PCI Miscellaneous Register state vmeCfg –s –r184 ■ To display Special PCI Target Image Register state vmeCfg –s –r188 ■ To display Master Control Register state vmeCfg –s –r400 ■ To display Miscellaneous Control Register state vmeCfg –s –r404 ■ To display User AM Codes Register state vmeCfg –s –r40C ■ To display VMEbus Register
Chapter 3 MOTLoad Firmware ■ Edits VMEbus Register Access Image Control Register state vmeCfg –e –rF70 Deleting VME Settings To delete the changeable VME setting (restore default value), type the following at the firmware prompt: ■ Deletes Master Enable state vmeCfg –d –m ■ Deletes selected Inbound Window state vmeCfg –d –i(0 - 7) ■ Deletes selected Outbound Window state vmeCfg –d –o(0 - 7) ■ Deletes PCI Miscellaneous Register state vmeCfg –d –r184 ■ Deletes Special PCI Target Image Register stat
Chapter 3 MOTLoad Firmware CR/CSR slave addresses configured by MOTLoad are assigned according to the installation slot in the backplane, as indicated by the VME64 Specification. For reference, the following values are provided: Slot Position CS/CSR Starting Address 1 0x0008.0000 2 0x0010.0000 3 0x0018.0000 4 0x0020.0000 5 0x0028.0000 6 0x0030.0000 7 0x0038.0000 8 0x0040.0000 9 0x0048.0000 A 0x0050.0000 B 0x0058.0000 C 0x0060.
Chapter 3 MOTLoad Firmware Alternate Boot Images and Safe Start Some later versions of MOTLoad support Alternate Boot Images and a Safe Start recovery procedure. If Safe Start is available on the MVME3100, Alternate Boot Images are supported. With Alternate Boot Image support, the bootloader code in the boot block examines the upper 8MB of the flash bank for Alternate Boot images. If an image is found, control is passed to the image.
Chapter 3 MOTLoad Firmware Firmware Scan for Boot Image The scan is performed by examining each 1MB boundary for a defined set of flags that identify the image as being Power On Self Test (POST), USER, or Alternate MOTLoad. POST is a userdeveloped Power On Self Test that would perform a set of diagnostics and then return to the bootloader image. USER would be a boot image, such as the VxWorks bootrom, which would perform board initialization. A bootable VxWorks kernel would also be a USER image.
Chapter 3 MOTLoad Firmware ... MVME3100> Valid Boot Images Valid boot images whether POST, USER, or Alternate MOTLoad, are located on 1MB boundaries within flash. The image may exceed 1MB in size. An image is determined valid through the presence of two "valid image keys" and other sanity checks.
Chapter 3 MOTLoad Firmware MOTLoad Image Flags The image flags of the header define various bit options that control how the image will be executed. Table 3-2.
Chapter 3 MOTLoad Firmware ■ L1 data cache has been initialized (invalidated) and is disabled. ■ L2 cache is disabled. ■ L3 cache is disabled. ■ RAM has been initialized and is mapped starting at CPU address 0. ■ If RAM ECC or parity is supported, RAM has been scrubbed of ECC or parity errors. ■ The active Flash bank (boot) is mapped from the upper end of the address space. ■ If specified by COPY_TO_RAM, the image has been copied to RAM at the address specified by ImageRamAddress.
Chapter 3 MOTLoad Firmware 34 MVME3100 Single-Board Computer Installation and Use (V3100A/IH1)
4 Functional Description 4 This chapter describes the MVME3100 and the MVME721 rear transition module (RTM) on a block diagram level. Features The following tables list the features of the MVME3100 and its RTM. Table 4-1.
Chapter 4 Functional Description Table 4-1. MVME3100 Features Summary (continued) Feature Description PCI Interface Bus A: – 66 MHz PCI or PCI-X mode (switch selectable) – One TSi148 VMEbus controller – One serial ATA (sATA) controller – One MPC8540 – Two PCI6520 PCI-X-to-PCI-X bridges (primary side) Bus B: – 33/66/100 MHz PCI/PCI-X (PCI 2.2 and PCI-X 1.0b compliant) – Two +3.
Chapter 4 Functional Description Table 4-1. MVME3100 Features Summary (continued) Feature Description VME Interface – VME64 (ANSI/VITA 1-1994) compliant – VME64 Extensions (ANSI/VITA 1.1-1997) compliant – 2eSST (ANSI/VITA 1.5-2003) compliant – VITA 41.0, version 0.
Chapter 4 Functional Description Block Diagrams Figure 4-1 shows a block diagram of the overall board architecture and Figure 4-2 shows a block diagram of the MVME721 rear transition module architecture. Figure 4-1.
Chapter 4 Functional Description Figure 4-2. MVME721 RTM Block Diagram Rear Panel Future Option U S B PIM 10 GigE RJ45 sATA 10/100 RJ45 Serial RJ45 Serial RJ45 Serial RJ45 Serial RJ45 PIM GigE 2 10/100 PMC 1 Jn4 10 Serial Port 4 Serial Port 3 Serial Port 2 Serial Port 1 VPD 8K8 sATA 3 USB 2 I2C Bus P2 P0 Future Option 4390 0106 Processor The MVME3100 supports the MPC8540 processor. The processor core frequency runs at 833 or 667 MHz. The MPC8540 has integrated 256KB L2 cache.
Chapter 4 Functional Description Flash Memory The MVME3100 provides one physical bank of soldered-on Flash memory. The bank is composed of two physical Flash devices configured to operate in 16-bit mode to form a 32-bit Flash bank. The default configuration for the MVME3100-1263 is 128MB using two 512Mb devices, and for the MVME3100-1152 it is 64MB using two 256Mb devices.
Chapter 4 Functional Description The I2C interface is also routed to the on-board SODIMM socket. This allows the serial presence detect (SPD) in the serial EEPROM, which is located on the memory module, to be read and used to configure the memory controller accordingly. Similarly, the I2C interface is routed to the P2 connector for access to the serial EEPROM located on the RTM. The device address for the RTM serial EERPOM is user-selectable using configuration switches on the RTM.
Chapter 4 Functional Description PCI/PCI-X Interfaces and Devices The MVME3100 provides three separate PCI/PCI-X bus segments. Bus segment A operates in 66 MHz PCI or PCI-X mode and is connected to the MPC8540, the TSi148 VME controller, the serial ATA (sATA) controller, and two PCI-X-to-PCI-X bridges. Bus segment B is bridged between bus A and the two PMC sites and operates in 33/66 MHz PCI or 66/100 MHz PCI-X mode depending on the slowest speed PMC installed.
Chapter 4 Functional Description PCI-X-to-PCI-X Bridges The MVME3100 uses two PLX PCI6520 PCI-X-to-PCI-X bridges to isolate the primary PCI bus, bus A. These bridges isolate bus A from bus B with the PMC sites and from bus C with the USB controller and PMCspan interface. The PCI6520 is a 64-bit, 133 MHz, PCI-X r1.0b compliant device. It operates asynchronously between 33 MHz and 133 MHz on either primary or secondary port.
Chapter 4 Functional Description In this case, the MVME3100 supports: Mezzanine Type: PMC = PCI Mezzanine Card Mezzanine Size: Double width and standard depth (150mm x 150mm) with front panel PMC Connectors: J11, J12, J13, J14, J21, J22, and J23 (32/64-bit PCI with front and rear I/O) on J14 only Signaling Voltage: VIO = +3.
Chapter 4 Functional Description Reset Control Logic The sources of reset on the MVME3100 are the following: ■ Power-up ■ Reset switch ■ Watchdog timer ■ System Control register bit ■ VMEbus reset A board-level hard reset generates a reset for the entire board including the MPC8540, local PCI/PCI-X buses, Ethernet PHYs, serial ports, Flash devices, and PLD(s). If the MVME3100 is configured as the VME system controller, the VME bus and local TSi148 reset input are also reset.
5 Pin Assignments 5 Introduction This chapter provides pin assignments for various connectors and headers on the MMVE3100 single-board computer and the MVME721 transition module.
Chapter 5 Pin Assignments Connectors PMC Expansion Connector (J4) One 114-pin Mictor connector with a center row of power and ground pins is used to provide PCI expansion capability. The pin assignments for this connector are as follows: Table 5-1. PMC Expansion Connector (J4) Pin Assignments 48 Pin Signal Signal Pin 1 +3.3V +3.
Chapter 5 Pin Assignments Table 5-1.
Chapter 5 Pin Assignments Table 5-1.
Chapter 5 Pin Assignments Table 5-2. Ethernet Connectors Pin Assignment (continued) Pin # Signal 1000 Mb/s 10/100 Mb/s 5 MDIO2+ _DC- Not Used 6 MDIO2- _DB- RD- 7 MDIO3+ _DD+ Not Used 8 MDIO3- _DD- Not Used PCI Mezzanine Card (PMC) Connectors (J11 – J14, J21 – J23) There are seven 64-pin SMT connectors on the MVME3100 to provide 32/64-bit PCI interfaces and P2 I/O for one optional add-on PMC. Note PMC slot connector J14 contains the signals that go to VME P2 I/O rows A, C, D, and Z.
Chapter 5 Pin Assignments Table 5-3. PMC Slot 1 Connector (J11) Pin Assignments (continued) Pin Signal Signal Pin 41 PCI_RSVD PCI_RSVD 42 43 PAR GND 44 45 +3.3V (VIO) AD15 46 47 AD12 AD11 48 49 AD09 +5V 50 51 GND C/BE0# 52 53 AD06 AD05 54 55 AD04 GND 56 57 +3.3V (VIO) AD03 58 59 AD02 AD01 60 61 AD00 +5V 62 63 GND REQ64# 64 Table 5-4.
Chapter 5 Pin Assignments Table 5-4. PMC Slot 1 Connector (J12) Pin Assignments (continued) Pin Signal Signal Pin 39 PERR# GND 40 41 +3.3V SERR# 42 43 C/BE1# GND 44 45 AD14 AD13 46 47 M66EN AD10 48 49 AD08 +3.3V 50 51 AD07 REQ1B# 52 53 +3.3V GNT1B# 54 55 Not Used GND 56 57 Not Used EREADY0 58 59 GND Not Used 60 61 ACK64# +3.3V 62 63 GND No Connect (MONARCH#) 64 Table 5-5.
Chapter 5 Pin Assignments Table 5-5. PMC Slot 1 Connector (J13) Pin Assignments (continued) Pin Signal Signal Pin 37 AD45 GND 38 39 +3.3V (VIO) AD44 40 41 AD43 AD42 42 43 AD41 GND 44 45 GND AD40 46 47 AD39 AD38 48 49 AD37 GND 50 51 GND AD36 52 53 AD35 AD34 54 55 AD33 GND 56 57 +3.3V (VIO) AD32 58 59 Reserved Reserved 60 61 Reserved GND 62 63 GND Reserved 64 Table 5-6.
Chapter 5 Pin Assignments Table 5-6.
Chapter 5 Pin Assignments Table 5-7. PMC Slot 2 Connector (J21) Pin Assignments (continued) Pin Signal Signal Pin 33 FRAME# GND 34 35 GND IRDY# 36 37 DEVSEL# +5V 38 39 GND LOCK# 40 41 PCI_RSVD PCI_RSVD 42 43 PAR GND 44 45 +3.3V (VIO) AD15 46 47 AD12 AD11 48 49 AD09 +5V 50 51 GND C/BE0# 52 53 AD06 AD05 54 55 AD04 GND 56 57 +3.3V (VIO) AD03 58 59 AD02 AD01 60 61 AD00 +5V 62 63 GND REQ64# 64 Table 5-8.
Chapter 5 Pin Assignments Table 5-8. PMC Slot 2 Connector (J22) Pin Assignments (continued) Pin Signal Signal Pin 31 AD16 C/BE2# 32 33 GND IDSEL1B 34 35 TRDY# +3.3V 36 37 GND STOP# 38 39 PERR# GND 40 41 +3.3V SERR# 42 43 C/BE1# GND 44 45 AD14 AD13 46 47 M66EN AD10 48 49 AD08 +3.3V 50 51 AD07 REQ1B# 52 53 +3.3V GNT1B# 54 55 Not Used GND 56 57 Not Used EREADY1 58 59 GND Not Used 60 61 ACK64# +3.
Chapter 5 Pin Assignments Table 5-9. PMC Slot 2 Connector (J23) Pin Assignments (continued) Pin Signal Signal Pin 29 AD51 AD50 30 31 AD49 GND 32 33 GND AD48 34 35 AD47 AD46 36 37 AD45 GND 38 39 +3.3V (VIO) AD44 40 41 AD43 AD42 42 43 AD41 GND 44 45 GND AD40 46 47 AD39 AD38 48 49 AD37 GND 50 51 GND AD36 52 53 AD35 AD34 54 55 AD33 GND 56 57 +3.
Chapter 5 Pin Assignments VMEbus P1 Connector The VME P1 connector is a 160-pin DIN. The P1 connector provides power and VME signals for 24-bit address and 16-bit data. The pin assignments for the P1 connector is as follows: Table 5-11.
Chapter 5 Pin Assignments VMEbus P2 Connector The VME P2 connector is a 160-pin DIN. Row B of the P2 connector provides power to the MVME3100 and to the upper eight VMEbus address lines and additional 16 VMEbus data lines. The pin assignments for the P2 connector are the same for both the MVME3100 and MVME721, and are as follows: Table 5-12.
Chapter 5 Pin Assignments Table 5-12. VME P2 Connector Pinouts (continued) Pin P2-Z P2-A P2-B P2-C P2-D 29 SP4CTS PMC1_IO58 VD30 PMC1_IO57 E2-1- 30 GND PMC1_IO60 VD31 PMC1_IO59 E2-1+ 31 SP4RTS PMC1_IO62 GND PMC1_IO61 GND 32 GND PMC1_IO64 +5V PMC1_IO63 +5V MVME721 PMC I/O Module (PIM) Connectors (J10, J14) PMC Host I/O connector J10 routes only power and ground from VME P2. There are no Host I/O signals on this connector.
Chapter 5 Pin Assignments Table 5-13. MVME721 Host I/O Connector (J10) Pin Assignments 49 No Connect GND 50 51 No Connect No Connect 52 53 +5V No Connect 54 55 No Connect No Connect 56 57 No Connect +3.
Chapter 5 Pin Assignments sATA Connectors (J28 and J29) The MVME3100 has two sATA connectors. J28 is an internal type sATA connector located on the planar and is intended to connect to a drive located on the board or somewhere inside the chassis. J29 is an external type sATA connected located on the front panel and is intended to connect to an external sATA drive. The pin assignment for these connectors is as follows: Table 5-16.
Chapter 5 Pin Assignments Processor COP Header (J25) There is one standard 16-pin header that provides access to the COP function. The pin assignments for this header are as follows: Table 5-18. Processor COP Header (J25) Pin Assignments Pin Signal Signal Pin 1 CPU_TDO No Connect 2 3 CPU_TDI CPU_TRST_L 4 5 Pullup CPU_VIO (+3.
A Specifications A Power Requirements In its standard configuration, the MVME3100 requires +5V for operation. On-board converters supply the processor core voltage, +3.3V, +1.8V, and +2.5V. For any installed PMC card that requires +12V or -12V, these voltages must be supplied by the chassis. Supply Current Requirements Table A-1 provides an estimate of the typical and maximum current required from each of the input supply voltages. Table A-1.
Appendix A Specifications Table A-2. MVME3100 Specifications (continued) 66 Characteristics Specifications Vibration Operating: 6 Gs RMS, 5-200 Hz sine Non-operating: 6 Gs RMS, 20-2000 Hz random Physical Dimensions 6U, 4HP wide (233.4 mm x 160 mm x 19.8 mm) (9.2 in. x 6.3 in. x 0.8 in) Weight 468 g/16.5 oz.
B Related Documentation B Motorola Computer Group Documents The Motorola publications listed below are referenced in this manual. You can obtain electronic copies of Motorola Computer Group publications by: ■ Contacting your local Motorola sales office ■ Visiting Motorola Computer Group’s World Wide Web literature site, http://www.motorola.com/computer/literature Table B-1.
Appendix B Related Documentation Manufacturers’ Documents For additional information, refer to the following table for manufacturers’ data sheets or user’s manuals. As an additional help, a source for the listed document is provided. Please note that, while these sources have been verified, the information is subject to change without notice. Table B-2.
Appendix B Related Documentation Table B-2. Manufacturers’ Documents (continued) Document Title and Source Publication Number EXAR ST16C554/554D, ST68C554 Quad UART with 16-Byte FIFOs ST16C554/554D Rev. 3.1.0 EXAR Corporation 48720 Kato Road Fremont, CA 94538 Web Site: www.exar.com 2-Wire Serial EEPROM AT24C512 Atmel Corporation San Jose, CA Web Site: www.atmel.com/atmel/support Maxim DS1621 Digital Thermometer and Thermostat DS1621 Maxim Integrated Products Web Site: www.maxim-ic.
Appendix B Related Documentation Related Specifications For additional information, refer to the following table for related specifications. For your convenience, a source for the listed document is also provided. It is important to note that in many cases, the information is preliminary and the revision levels of the documents are subject to change without notice. Table B-3. Related Specifications Document Title and Source Publication Number VITA http://www.vita.
