M5282EVB User's Manual M5282EVBUM Rev. 0.
DigitalDNA and Mfax are trademarks of Motorola, Inc. IBM PC and IBM AT are registered trademark of IBM Corp. All other trademark names mentioned in this manual are the registered trade mark of respective owners No part of this manual and the dBUG software provided in Flash ROM’s/EPROM’s may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise.
EMC Information on M5282EVB 1. 2. 3. 4. 5. This product as shipped from the factory with associated power supplies and cables, has been tested and meets with requirements of EN5022 and EN 50082-1: 1998 as a CLASS A product. This product is designed and intended for use as a development platform for hardware or software in an educational or professional laboratory. In a domestic environment this product may cause radio interference in which case the user may be required to take adequate measures.
WARNING This board generates, uses, and can radiate radio frequency energy and, if not installed properly, may cause interference to radio communications. As temporarily permitted by regulation, it has not been tested for compliance with the limits for class a computing devices pursuant to Subpart J of Part 15 of FCC rules, which are designed to provide reasonable protection against such interference.
Contents Paragraph Section Number Title Page Number Chapter 1 M5282EVB 1.1 1.2 1.2.1 1.2.2 1.2.3 1.2.4 1.2.5 1.2.6 1.2.6.1 1.2.6.2 1.3 1.3.1 1.3.2 1.3.3 1.3.4 1.3.5 1.3.6 1.4 1.4.1 1.4.2 1.4.3 1.4.4 1.4.5 1.4.6 1.5 1.5.1 1.5.2 1.5.3 1.5.4 1.5.5 1.6 1.7 MOTOROLA MCF5282 Microprocessor ................................................................................... 1-3 System Memory ................................................................................................... 1-6 External Flash .
Contents Paragraph Number Title Page Number Chapter 2 Initialization and Setup 2.1 2.2 2.2.1 2.2.2 2.2.3 2.2.4 2.2.5 2.2.6 2.2.7 2.3 2.4 System Configuration .......................................................................................... 2-1 Installation and Setup........................................................................................... 2-3 Unpacking........................................................................................................
Contents Paragraph Number Title Page Number Appendix C Evaluation Board BOM MOTOROLA Contents iii
Contents Paragraph Number iv Title BookTitle Page Number MOTOROLA
TABLES Table Number 1-1 1-2 1-3 1-4 1-5 1-6 1-7 1-8 1-9 1-10 1-11 1-12 1-13 1-14 1-15 1-16 1-17 1-18 1-19 1-20 1-21 1-22 1-23 1-24 2-1 2-2 2-3 3-1 C-1 Title Page Number The M5282EVB Default Memory Map........................................................................ 1-7 JP 6 - CS0 Settings........................................................................................................ 1-8 D[19:18] External Boot Chip Select Configuration .....................................................
TABLES Table Number vi Title Page Number MCF5272 User’s Manual MOTOROLA
ILLUSTRATIONS Figure Number 1-1 1-2 1-3 2-1 2-2 2-3 3-1 Title Page Number M5282EVB block diagram ........................................................................................... 1-3 MCF5282 Block Diagram ............................................................................................ 1-5 J4- BDM Connector pin assignment........................................................................... 1-15 Minimum System Configuration ......................................................
ILLUSTRATIONS Figure Number viii Title MCF5272 User’s Manual Page Number MOTOROLA
Chapter 1 M5282EVB The M5282EVB is a MCF5282-based evaluation board that can be used for the development and test of microcontroller systems (see Figure 1-1). The MCF5282 is a member of the Motorola ColdFire 32-bit processor family. The evaluation board is a development and test platform for software and hardware for the MCF5282. It can be used by software and hardware developers to test programs, tools, or circuits without having to develop a complete microprocessor system themselves.
• 64-Kbyte SRAM internal to MCF5282 device Peripherals • Ethernet port 10/100Mb/s (Dual-Speed Fast Ethernet Transceiver, with MII) • UART0 (RS-232 serial port for dBUG firmware) • UART1 (auxiliary RS-232 serial port) • I2C interface • QSPI interface • QADC interface • FlexCan interface • BDM/JTAG interface User Interface • Reset logic switch (debounced) • Boot logic jumper (dip switch) selectable • Abort/IRQ7 logic switch (debounced) • Clocking options - Oscillator, Crystal or SMA for external clocking sign
MCF5282 Microprocessor DB-9 (2) connector RS-232 transceivers (2) RJ-45 connector Ethernet Transceiver 26-pin Debug Header ColdFire MCF5282 Clocking circuitry 16 MHz Osc. Control Signals Address [31:0] CAN Transceiver Data [31:0] DB-9 connector Peripheral signals 25 MHz Osc. SDRAM 8 Mbytes MCU Target Board connectors Flash 2 Mbytes SRAM 1 Mbyte (2) 120 pin Daughter Card expansion connectors Figure 1-1. M5282EVB block diagram 1.
MCF5282 Microprocessor • • • • • • • • • • Four 32-bit DAM timers Two 4-channel general purpose timers Four periodic interrupt timers(PITs) Software watchdog timer Phase Locked Loop (PLL) Two interrupt controllers DMA controller (4 channels) External bus interface General purpose I/O interface JTAG The MCF5282 communicates with external devices over a 32-bit wide data bus, D[0:31]. The MCF5282 can address a 32 bit address range. However, only 24 bits are available on the external bus.
Chip Configuration Reset Controller Power Management MCF5282 Microprocessor JTAG Port External Interface Module Test Controller Debug Module Ports Module Coldfire V2 Core DIV EMAC 2-Kbyte D-Cache/I-Cache 64K SRAM Flash Module Interrupt Controller 1 DMA Controller Interrupt Controller 0 Internal Bus Arbiter Edgeport System Control Module (SCM) Chip Selects DRAM Controller UART0 Serial I/O Clock Module (PLL) UART1 Serial I/O UART2 Serial I/O DMA Timer Modules (DTIM0– DTIM3) I 2C Modu
System Memory 1.2 System Memory 1.2.1 External Flash One on-board Flash ROM (U5) is used in the system. The Am29lv160DB device contains 16Mbits of non-volatile storage (2 M x 8-bit/1 M x 16-bit) giving a total of 2MBytes of Flash memory. Refer to the specific device data sheet and sample software provided for configuring the flash memory. Users should note that the debug monitor firmware is installed in this flash device.
System Memory performed under CPU control through a command driven interface to an internal state machine. All Flash physical blocks can be programmed or erased at the same time; however, it is not possible to read from a Flash physical block while the same block is being programmed or erased. The array used in the MCF5282 makes it possible to program or erase one pair of Flash physical blocks under the control of software routines executing out of another pair.
Support Logic Table 1-2. JP 6 - CS0 Settings JP6 CS0 CS1 Across 1&2, 3&4 External Flash External SRAM Across 1&3, 2&4 External SRAM External Flash 1.2.6.2 Reset Vector Mapping Asserting the reset input signal to the processor causes a reset exception. The reset exception has the highest priority of any exception; it provides for system initialization and recovery from catastrophic failure. Reset also aborts any processing in progress when the reset input is recognized.
Support Logic Watchdog Timer is disabled, the Bus Monitor is enabled, and the internal timers are placed in a stop condition. A memory map for the entire board can be seen in Table 3-1. If the external RCON pin is asserted (SW1-1 ON) during reset, then various chip functions, including the reset configuration pin functions after reset, are configured according to the levels driven onto the external data pins. See tables below on settings for reset configurations.
Support Logic Table 1-8. SW1-[9:8] Boot Device SW1-8 SW1-9 RCON (SW1-1) Boot Device OFF OFF ON Internal (32-bit) OFF ON ON External (16-bit) ON OFF ON External (8-bit) ON ON ON External (32-bit) X X OFF Internal (32-bit) Table 1-9. SW1-10 Bus Drive Strength SW1-10 RCON (SW1-1) Drive Strength OFF ON Partial Bus Drive ON ON Full Bus Drive X OFF Full Bus Drive Table 1-10.
Support Logic 1.3.4 Exception Sources The ColdFire® family of processors can receive seven levels of interrupt priorities. When the processor receives an interrupt which has a higher priority than the current interrupt mask (in the status register), it will perform an interrupt acknowledge cycle at the end of the current instruction cycle.
Communication Ports waits for a transfer acknowledgment (TA) either from within (Auto acknowledge - AA mode) or from the externally addressed device before it can complete the bus cycle. -TA is used to indicate the completion of the bus cycle. It also allows devices with different access times to communicate with the processor properly asynchronously.
Communication Ports available on DB-9 connectors (P4) and (P5). UART signal pins that are multiplexed with other functions on the MCF5282 can be disconnected from the UART transceivers by removing specific jumper JP[28:35]. Table 1-12.
Communication Ports 1.4.3 10/100T Ethernet Port The MCF5272 device performs the full set of IEEE 802.3/Ethernet CSMA/CD media access control and channel interface functions. The MCF5282 Ethernet Controller requires an external interface adaptor and transceiver function to complete the interface to the ethernet media. The MCF5282 Ethernet module also features an integrated fast (100baseT) Ethernet media access controller (MAC).
Communication Ports BKPT DEVELOPER RESERVED 1 2 GND 3 4 GND 5 6 RESET 7 8 I/O or Pad Voltage 9 10 GND 11 12 PST2 13 14 PST0 15 16 DDATA2 17 18 DDATA1 DDATA0 19 20 GND MOTOROLA RESERVED 21 22 MOTOROLA RESERVED GND 23 24 Core Voltage 25 26 DSCLK DEVELOPER RESERVED DSI DSO PST3 PST1 DDATA3 PSTCLK TA Figure 1-3. J4- BDM Connector pin assignment The “PSTCLK” signal driven on pin 24 of the BDM interface can be selected from two different sources controlled by JP17.
Connectors and User Components • • • • Start and stop signal generation and detection Repeated start signal generation Acknowledge bit generation and detection Bus busy detection Please see the MCF5282 Users Manual for more detail. The I2C signals from the MCF5282 device are brought out to expansion connector (J10). Jumpers JP36 and JP37 can be used to connect/disconnect the I2C signals, SDA and SCL, from the daughter card expansion connector, J3. 1.4.
Connectors and User Components Table 1-17. J5 Pin MCF5282 Signal Pin MCF5282 Signal 11 AN56/PQA4 12 GPTB3 13 AN55/PQA3 14 AN53/PQA1 15 GPTB2 16 AN1/PQB1 17 AN2/PQB2 18 VDDA 19 AN3/PQB3 20 VRH Table 1-18.
Connectors and User Components connectors are idea for interfacing to a custom daughter card or for simple probing of processor signals. Below is a pinout description of these connectors. Table 1-20. J2 Pin 1-18 Signal Pin Signal Pin Signal Pin Signal 1 D31 2 A0 61 D9 62 A23 3 D30 4 GND 63 D8 64 OE 5 D29 6 A1 65 D7 66 GND 7 D28 8 A2 67 GND 68 TA 9 GND 10 A3 69 D6 70 TEA 11 D27 12 A4 71 D5 72 R/W 13 D26 14 A5 73 D4 74 +3.3V 15 +3.
Connectors and User Components Table 1-21. J3 Pin Signal Pin Signal Pin Signal Pin Signal 1 +3.3V 2 +3.3V 61 QSPIDO 62 GND 3 GND 4 VDDA 63 QSPIDI 64 SDA 5 IRQ1 6 DDATA0 65 QSPICLK 66 SCL 7 IRQ2 8 DDATA1 67 GND 68 GND 9 IRQ3 10 +3.3V 69 QSPICS0 70 EXTAL 11 IRQ4 12 DDATA2 71 QSPICS1 72 XTAL 13 IRQ5 14 DDATA3 73 QSPICS2 74 GND 15 IRQ6 16 PST0 75 +3.3V 76 GND 17 IRQ7 18 VDDA 77 QSPICS3 78 +3.3V 19 +3.
Connectors and User Components A hard reset and voltage sense controller (U12) is used to produce an active low power-on RESET signal. The reset switch S2 is fed into U12 which generates the signal which is fed to the MCF5282 reset, RSTI. The RSTI signal is an open collector signal and so can be wire OR’ed with other reset signals from additional peripherals. dBUG configures the MCF5282 microprocessor internal resources during initialization. The instruction cache is invalidated and disabled.
M5282EVB Power Configuration 1.6 M5282EVB Power Configuration The power applied to the board should be between 6 and 12 V DC though P2 or P3. The user can connect M5282EVB a power supply with two possible connectors: a 2.1mm diameter Power Jack Connector (P2), or a 2-way Bare Wire Power Connector (P3). SW2 (when in the ON position will route the power supply current though voltage regulators to supply the MCF5282 and to the components with +3.3VDC and +5VDC as needed.
Software Development 1-22 M5282EVB User’s Manual PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Chapter 2 Initialization and Setup 2.1 System Configuration The M5282EVB board requires the following items for minimum system configuration: • The M5282EVB board (provided). • Power supply, +6V to 12V DC with minimum of 1.0 Amp. • RS232C compatible terminal or a PC with terminal emulation software. • RS232 Communication cable (provided). Figure 2-1., “Minimum System Configuration” displays the minimum system configuration. Chapter 2.
System Configuration dBUG> 6 - 12 V Input Power RS-232 Terminal Or PC Figure 2-1.
Installation and Setup 2.2 Installation and Setup The following sections describe all the steps needed to prepare the board for operation. Please read the following sections carefully before using the board. When you are preparing the board for the first time, be sure to check that all jumpers are in the default locations. Default jumper markings are documented on the master jumper table and printed on the underside of the board.
Installation and Setup Table 2-2. Power Supply Connections on P3 Contact Number Voltage 1 +6V to +12V DC 2 Ground 2.2.4 Selecting Terminal Baud Rate The serial channel UART0 of the MCF5282 is used for serial communication and has a built in timer. This timer is used by the dBUG ROM monitor to generate the baud rate used to communicate with a serial terminal. A number of baud rates can be programmed. On power-up or manual RESET, the dBUG ROM monitor firmware configures the channel for 19200 baud.
Installation and Setup 5 1 9 6 Figure 2-2. Pin assignment for female (Terminal) connector Pin assignments are as follows: Table 2-3.
System Power-up and Initial Operation Figure 2-3. Jumper Locations 2.3 System Power-up and Initial Operation When all of the cables are connected to the board, power may be applied. The dBUG ROM Monitor initializes the board and then displays a power-up message on the terminal, which includes the amount of memory present on the board.
Using The BDM Port Copyright 1995-2003 Motorola, Inc. All Rights Reserved. ColdFire MCF5282 EVS Firmware v2e.1a.xx (Build XXX on XXX xx:xx:xx) XX 20XX Enter 'help' for help. dBUG> The board is now ready for operation under the control of the debugger as described in Chapter 2. If you do not get the above response, perform the following checks: 1. Make sure that the power supply is properly configured for polarity, voltage level and current capability (~1A) and is connected to the board. 2.
Using The BDM Port 2-8 M5282EVB User’s Manual PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Chapter 3 Using the Monitor/Debug Firmware The M5282EVB single board computer has a resident firmware package that provides a self-contained programming and operating environment. The firmware, named dBUG, provides the user with monitor/debug interface, inline assembler and disassembly, program download, register and memory manipulation, and I/O control functions. This chapter is a how-to-use description of the dBUG package, including the user interface and command structure. 3.
Operational Procedure Most commands can be recognized by using an abbreviated name. For instance, entering “h” is the same as entering “help”. Thus, it is not necessary to type the entire command name. The commands DI, GO, MD, STEP and TRACE are used repeatedly when debugging. dBUG recognizes this and allows for repeated execution of these commands with minimal typing. After a command is entered, simply press or to invoke the command again.
Operational Procedure Figure 3-1 shows the dBUG operational mode. INITIALIZE COMMAND LINE INPUT FROM TERMINAL NO EXECUTE COMMAND FUNCTION YES NO DOES COMMAND LINE CAUSE USER PROGRAM EXECUTION YES JUMP TO USER PROGRAM AND BEGIN EXECUTION Figure 3-1. Flow Diagram of dBUG Operational Mode 3.2.2 System Initialization The act of powering up the board will initialize the system. The processor is reset and dBUG is invoked.
Command Line Usage dBUG source files on the ColdFire website (www.motorola.com/coldfire) for the complete initialization code sequence. After initialization, the terminal will display: Hard Reset DRAM Size: 16M Copyright 1995-2002 Motorola, Inc. All Rights Reserved. ColdFire MCF5282 EVS Firmware v2e.1a.1a (Build XXX on XXX) Enter 'help' for help. dBUG> If you did not get this response check the setup, refer to section 3.2.
Commands The command line prompt is: dBUG> Any dBUG command may be entered from this prompt. dBUG does not allow command lines to exceed 80 characters. Wherever possible, dBUG displays data in 80 columns or less. dBUG echoes each character as it is typed, eliminating the need for any local echo on the terminal side. The and keys are recognized as rub-out keys for correcting typographical mistakes.
Commands Table 3-1. dBUG Command Summary Mnemonic 3-6 Syntax Description ASM asm < stmt> Assemble BC bc addr1 addr2 length Block Compare BF bf begin end data Block Fill IRM irm module.
Commands ASM Assembler Usage: ASM < stmt> The ASM command is a primitive assembler. The is assembled and the resulting code placed at . This command has an interactive and non-interactive mode of operation. The value for address may be an absolute address specified as a hexadecimal value, or a symbol name. The value for stmt must be valid assembler mnemonics for the CPU. For the interactive mode, the user enters the command and the optional .
Commands BC Block Compare Usage:BC addr1 addr2 length The BC command compares two contiguous blocks of memory on a byte by byte basis. The first block starts at address addr1 and the second starts at address addr2, both of length bytes. If the blocks are not identical, the address of the first mismatch is displayed. The value for addresses addr1 and addr2 may be an absolute address specified as a hexadecimal value or a symbol name.
Commands BF Block Fill Usage:BF begin end data The BF command fills a contiguous block of memory starting at address begin, stopping at address end, with the value data. modifies the size of the data that is written. If no is specified, the default of word sized data is used. The value for addresses begin and end may be an absolute address specified as a hexadecimal value, or a symbol name.
Commands BM Block Move Usage:BM begin end dest The BM command moves a contiguous block of memory starting at address begin and stopping at address end to the new address dest. The BM command copies memory as a series of bytes, and does not alter the original block. The values for addresses begin, end, and dest may be absolute addresses specified as hexadecimal values, or symbol names.
Commands BR Breakpoints Usage:BR addr <-r> <-c count> <-t trigger> The BR command inserts or removes breakpoints at address addr. The value for addr may be an absolute address specified as a hexadecimal value, or a symbol name. Count and trigger are numbers converted according to the user-defined radix, normally hexadecimal. If no argument is provided to the BR command, a listing of all defined breakpoints is displayed. The -r option to the BR command removes a breakpoint defined at address addr.
Commands BS Block Search Usage:BS begin end data The BS command searches a contiguous block of memory starting at address begin, stopping at address end, for the value data. modifies the size of the data that is compared during the search. If no is specified, the default of word sized data is used. The values for addresses begin and end may be absolute addresses specified as hexadecimal values, or symbol names.
Commands DC Data Conversion Usage:DC data The DC command displays the hexadecimal or decimal value data in hexadecimal, binary, and decimal notation. The value for data may be a symbol name or an absolute value. If an absolute value passed into the DC command is prefixed by ‘0x’, then data is interpreted as a hexadecimal value. Otherwise data is interpreted as a decimal value. All values are treated as 32-bit quantities.
Commands DI Disassemble Usage:DI The DI command disassembles target code pointed to by addr. The value for addr may be an absolute address specified as a hexadecimal value, or a symbol name. Wherever possible, the disassembler will use information from the symbol table to produce a more meaningful disassembly. This is especially useful for branch target addresses and subroutine calls. The DI command attempts to track the address of the last disassembled opcode.
Commands DL Download Console Usage:DL The DL command performs an S-record download of data obtained from the console, typically a serial port. The value for offset is converted according to the user-defined radix, normally hexadecimal. Please reference the ColdFire Microprocessor Family Programmer’s Reference Manual for details on the S-Record format. If offset is provided, then the destination address of each S-record is adjusted by offset.
Commands DN Download Network Usage:DN <-c> <-e> <-i> <-s> <-o offset> The DN command downloads code from the network. The DN command handle files which are either S-record, COFF, ELF or Image formats. The DN command uses Trivial File Transfer Protocol (TFTP) to transfer files from a network host. In general, the type of file to be downloaded and the name of the file must be specified to the DN command.
Commands GO Execute Usage:GO The GO command executes target code starting at address addr. The value for addr may be an absolute address specified as a hexadecimal value, or a symbol name. If no argument is provided, the GO command begins executing instructions at the current program counter. When the GO command is executed, all user-defined breakpoints are inserted into the target code, and the context is switched to the target program.
Commands GT Execute To Usage:GT addr The GT command inserts a temporary breakpoint at addr and then executes target code starting at the current program counter. The value for addr may be an absolute address specified as a hexadecimal value, or a symbol name. When the GT command is executed, all breakpoints are inserted into the target code, and the context is switched to the target program.
Commands IRD Internal Register Display Usage:IRD This command displays the internal registers of different modules inside the MCF5xxx. In the command line, module refers to the module name where the register is located and register refers to the specific register to display. The registers are organized according to the module to which they belong. The available modules on the MCF5xxx are CS, DMA0, DMA1, DMA2, DMA3, DRAMC, PP, MBUS, SIM, TIMER1, TIMER2, UART0 and UART1.
Commands IRM Internal Register Modify Usage:IRM module.register data This command modifies the contents of the internal registers of different modules inside the MCF5xxx. In the command line, module refers to the module name where the register is located and register refers to the specific register to modify. The data parameter specifies the new value to be written into the register. The registers are organized according to the module to which they belong.
Commands HELP Help Usage:HELP The HELP command displays a brief syntax of the commands available within dBUG. In addition, the address of where user code may start is given. If command is provided, then a brief listing of the syntax of the specified command is displayed. Examples: To obtain a listing of all the commands available within dBUG, the command is: help To obtain help on the breakpoint command, the command is: help br Chapter 3.
Commands LR Loop Read Usage:LR addr The LR command continually reads the data at addr until a key is pressed. The optional specifies the size of the data to be read. If no is specified, the command defaults to reading word sized data. Example: To continually read the longword data from address 0x20000, the command is: lr.
Commands LW Loop Write Usage:LW addr data The LW command continually writes data to addr. The optional width specifies the size of the access to memory. The default access size is a word. Examples: To continually write the longword data 0x12345678 to address 0x20000, the command is: lw.l 20000 12345678 Note that the following command writes 0x78 into memory: lw.b 20000 12345678 Chapter 3.
Commands MD Memory Display Usage:MD The MD command displays a contiguous block of memory starting at address begin and stopping at address end. The values for addresses begin and end may be absolute addresses specified as hexadecimal values, or symbol names. Width modifies the size of the data that is displayed. If no is specified, the default of word sized data is used. Memory display starts at the address begin.
Commands MM Memory Modify Usage:MM addr The MM command modifies memory at the address addr. The value for addr may be an absolute address specified as a hexadecimal value, or a symbol name. Width specifies the size of the data that is modified. If no is specified, the default of word sized data is used. The value for data may be a symbol name, or a number converted according to the user-defined radix, normally hexadecimal.
Commands MMAP Memory Map Display Usage:mmap This command displays the memory map information for the M5282EVB evaluation board. The information displayed includes the type of memory, the start and end address of the memory, and the port size of the memory. The display also includes information on how the Chip-selects are used on the board.
Commands RD Register Display Usage:RD The RD command displays the register set of the target. If no argument for reg is provided, then all registers are displayed. Otherwise, the value for reg is displayed. dBUG preserves the registers by storing a copy of the register set in a buffer. The RD command displays register values from the register buffer.
Commands RM Register Modify Usage:RM reg data The RM command modifies the contents of the register reg to data. The value for reg is the name of the register, and the value for data may be a symbol name, or it is converted according to the user-defined radix, normally hexadecimal. dBUG preserves the registers by storing a copy of the register set in a buffer. The RM command updates the copy of the register in the buffer. The actual value will not be written to the register until target code is executed.
Commands RESET Reset the Board and dBUG Usage:RESET The RESET command resets the board and dBUG to their initial power-on states. The RESET command executes the same sequence of code that occurs at power-on. If the RESET command fails to reset the board adequately, cycle the power or press the reset button. Examples: To reset the board and clear the dBUG data structures, the command is: reset Chapter 3.
Commands SET Set Configurations Usage:SET
Commands SHOW Show Configurations Usage:SHOW
Commands STEP Step Over Usage:STEP The STEP command can be used to “step over” a subroutine call, rather than tracing every instruction in the subroutine. The ST command sets a temporary breakpoint one instruction beyond the current program counter and then executes the target code. The STEP command can be used to “step over” BSR and JSR instructions. The STEP command will work for other instructions as well, but note that if the STEP command is used with an instruction that will not return, i.e.
Commands SYMBOL Symbol Name Management Usage:SYMBOL <-a symb value> <-r symb> <-c|l|s> The SYMBOL command adds or removes symbol names from the symbol table. If only a symbol name is provided to the SYMBOL command, then the symbol table is searched for a match on the symbol name and its information displayed. The -a option adds a symbol name and its value into the symbol table. The -r option removes a symbol name from the table.
Commands TRACE Trace Into Usage:TRACE The TRACE command allows single-instruction execution. If num is provided, then num instructions are executed before control is handed back to dBUG. The value for num is a decimal number. The TRACE command sets bits in the processors’ supervisor registers to achieve single-instruction execution, and the target code executed. Control returns to dBUG after a single-instruction execution of the target code. This command is repeatable.
Commands UPDBUG Update dBUG Usage:updbug The updbug command is used to update the dBUG image in Flash. When updates to the M5282EVB dBUG are available, the updated image is downloaded to address 0x00020000. The new image is placed into Flash using the UPDBUG command. The user is prompted for verification before performing the operation. Use this command with extreme caution, as any error can render dBUG useless! Chapter 3.
Commands UPUSER Update User Flash Usage:UPUSER The UPUSER command places user code and data into space allocated for the user in Flash. The optional parameter bytes specifies the number of bytes to copy into the user portion of Flash.If the bytes parameter is omitted, then this command writes to the entire user space. There are seven sectors of 256K each available as user space. Users access this memory starting at address 0xFFE40000.
TRAP #15 Functions VERSION Display dBUG Version Usage:VERSION The VERSION command displays the version information for dBUG. The dBUG version, build number and build date are all given. dBUG common major and minor revision { { In this example, v 2b . 1c . 1a { The version number is separated by a decimal, for example, “v 2b.1c.1a”. CPU major and minor revision board major and minor revision The version date is the day and time at which the entire dBUG monitor was compiled and built.
TRAP #15 Functions */ #if l /* LINK a6,#0 -- produced by C compiler */ asm (“ move.l8(a6),d1”); /* put ‘ch’into d1 */ asm (“ move.l#0x0013,d0”); asm (“ trap#15”); /* UNLK a6 /* select the function */ /* make the call */ -- produced by C compiler */ #else /* * If C compiler does not produce a LINK/UNLK pair, the use the following code. */ asm (“ move.l4(sp),d1”); asm (“ move.l#0x0013,d0”); asm (“ trap#15”); /* put ‘ch’into d1 */ /* select the function */ /* make the call */ #endif } 3.5.
TRAP #15 Functions C example: int board_char_present (void) { asm (“ move.l#0x0014,d0”); /* select the function */ asm (“ trap #15”); /* make the call */ } 3.5.4 EXIT_TO_dBUG This function (function code 0x0000) transfers the control back to the dBUG, by terminating the user code. The register context are preserved. Assembly example: move.l #$0000,d0 Select the function trap #15 Make the call, exit to dBUG. C example: void board_exit_to_dbug (void) { asm (“ move.
TRAP #15 Functions 3-40 M5282EVB User’s Manual PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Appendix A Configuring dBUG for Network Downloads The dBUG module has the ability to perform downloads over an Ethernet network using the Trivial File Transfer Protocol, TFTP (NOTE: this requires a TFTP server to be running on the host attached to the board). Prior to using this feature, several parameters are required for network downloads to occur. The information that is required and the steps for configuring dBUG are described below. A.
Configuring dBUG Network Parameters A.2 Configuring dBUG Network Parameters Once the network parameters have been obtained, the dBUG Rom Monitor must be configured. The following commands are used to configure the network parameters. set set set set set client server gateway netmask mac For example, the TFTP server is named ‘santafe’ and has IP address 123.45.67.1. The board is assigned the IP address of 123.45.68.15. The gateway IP address is 123.
Troubleshooting Network Problems Finally, perform the network download with the ‘dn’ command. The network download process uses the configured IP addresses and the default filename and filetype for initiating a TFTP download from the TFTP server. A.3 Troubleshooting Network Problems Most problems related to network downloads are a direct result of improper configuration. Verify that all IP addresses configured into dBUG are correct. This is accomplished via the ‘show ’command.
Troubleshooting Network Problems A-4 M5282EVB Reference Board User’s Manual MOTOROLA
Appendix B Schematics MOTOROLA Appendix B.
Sheet 5 M5282EVB Reference Board User’s Manual A B C D B-2 MOTOROLA 5 5 TCLK -BKPT DSCLK DSI DSO DDATA[3:0] PST[3:0] CLKMOD1 CLKMOD0 JTAG_EN -RCON -SD_CS1 SCKE -SDWE -SCAS -SRAS -SD_CS0 -BS[3:0] R/W -OE -RSTI -RSTO CLKOUT D[31:0] A[23:0] CANRX CANTX -IRQ[7:1] ECRS ECOL ETXEN ETXER ERXDV ERXCLK ETXCLK ETXD[3:0] ERXER ERXD[3:0] EMDC EMDIO -CS[3:0] -TS -TA -TEA AN[3:0] AN56 AN55 AN53 AN52 EXTAL XTAL GPTB[3:0] GPTA[3:0] QSPIDO QSPIDI QSPICLK QSPICS[3:0] URXD0 UTXD0 URXD1 UTXD1 DTIN3 DTIN2 DTIN1 DTIN0
5 5 CANRX CANTX C1 0.1uF +3.3V Appendix B. Schematics A B C D MOTOROLA B-3 C2 1nF +3.3V 1 2 3 4 4 4 RS CANH CANL VREF SN65HVD230D D GND VCC R U1 8 7 6 5 1K R1 3 JP1 2 Transceiver mode 1 Default setting for JP1 is NOT fitted. 3 +3.3V Date: Size A Title 62 R2 1 2 Default setting for JP2 is fitted.
A B C D SCKE -SD_CS1 0.1uF 0.1uF C5 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 4x 22 1 3 5 7 RP2 4x 22 1 3 5 7 RP1 1 3 5 7 1 3 5 7 NOTE: minimise track lengths between U2 and RP1/RP2. 0.
VDD CLK OE GND 25MHz VDD OE U3 8 11 14 -RSTO 2 4 6 8 RP6 2 4 6 8 R12 +3.3V C38 0.1uF 5 50 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PCSBP ISODEF ISO TGND1 REFCLK CLK25 BURN_IN RST PWRDN PLLVCC PLLGND OGND1 OVDD1 PHYAD[4]/10RXDPHYAD[3]/10RXD+ PHYAD[2]/10TXD++ PHYAD[1]/10TXD+ PHYAD[0]/10TXDGPIO[0]/10TXD-/7Wire GPIO[1]/TP125 U4 C39 0.1uF C40 0.
A B C D C45 1nF +5V D[31:0] A[23:0] D[31:0] 5 C46 1nF CLKMOD1 CLKOUT -SD_CS0 -SD_CS1 SCKE -SDWE -SRAS -SCAS 5 C47 0.1uF C48 0.
A B C D A[23:0] A[23:0] 3 5 D[31:0] R/W -RSTO 16MBit Flash Boot PU_FLASH_A19 1 JP16 D[31:0] A20 Default setting - JP16 fitted across pins 1 & 2. 5 2 MOTOROLA Appendix B.
5 4 C59 0.1uF +3.3V 5 1 3 5 7 +3.3V 2 4 6 8 C60 0.1uF 4x 4.7K 1 3 5 7 RP13 C61 1nF 2 4 6 8 C62 1nF FSRAM_CS -BS[3:0] CLKOUT -OE R/W A[23:0] 4 A[23:0] -BS[3:0] NOTE: Alternative FSRAM's with the same PCB footprint and functionality are :- Samsung K7B403625M, Cypress CY7C1345 & IDT 71V3577.
A B C +3.3V 5 Open/Off Configuration DIP switch - Grayhill 78RB12 Closed/On SW1 1 3 5 7 2 4 6 8 2 4 6 8 RCON JTAG_EN CLKMOD1 CLKMOD0 D26 D17 D16 D19 D18 D21 D25 D24 4x 4.7K 1 3 5 7 RP14 +3.3V 4 NOTE: Please place these tables on the silkscreen on the topside of the PCB close to SW1. 1 3 5 7 2 4 6 8 4x 4.
+3.3V M5282EVB Reference Board User’s Manual A B C D B-10 C64 0.1uF MOTOROLA AN52 5 C65 0.
A B C 2 1 Augat 25V-02 P3 2-way Bare Wire Power Connector 5 Exte rnal Clock O scillator Cr ysta l * = Default Setting JP25 ON OFF ON Clock Selection 1-2 1-2 2-3 JP26 ON ON OFF * JP27 C80 0.1uF +3.3V C81 10nF 3 1 6 4 J8 Osc. Enable R16 10K 1nF 0.1uF MBRS340T3 D12 5A Fast blow. F1 CLK VDD VDD 16MHz GND OE OE 8 11 14 C82 10pF C83 10pF 4 +3.
-RSTO -RSTI -TA -CS[3:0] -BS[3:0] -TIP -TS M5282EVB Reference Board User’s Manual A B C D 5 5 PU_FLASH-BYTE -OE R/W PU_FLASH_A19 B-12 MOTOROLA 1 3 5 7 R21 1K +3.3V 8 6 4 2 1 3 5 7 RP18 1 3 5 7 RP23 1 3 5 7 RP19 2 4 6 8 2 4 6 8 2 4 6 8 4x 4.7K 7 5 3 1 -IRQ[7:1] -CS1 1 -CS0 3 5 7 -BS1 -BS0 -CS3 -CS2 1 3 -BS3 5 -BS2 7 7 5 3 1 RP17 +3.3V 4x 4.7K 2 4 6 8 -IRQ[7:1] +3.3V 4x 4.7K 2 4 6 8 +3.3V 4x 4.7K 2 4 6 8 8 6 4 2 +3.
A B C D -BS[3:0] MOTOROLA Appendix B. Schematics B-13 5 5 -BS0 -BS2 -SDWE -SCAS -SRAS -SD_CS0 4 4 A22 A23 A20 A15 A14 A13 A12 D7 D5 D6 D3 D4 D1 D2 +3.3V A22 A23 A20 A15 A14 A13 A12 D0 D23 D21 D22 D19 D20 D17 D18 D16 +3.
C100 1nF +3.3V M5282EVB Reference Board User’s Manual A B C D GPTB[3:0] B-14 MOTOROLA 5 C101 0.1uF GPTB[3:0] 5 GPTB1 1 1 1 1 JP31 JP30 JP29 GPTB3 1 1 1 1 JP35 JP34 JP33 JP32 2 2 2 2 2 2 2 2 C102 1nF +3.3V C103 0.1uF 1 3 5 7 +5V C97 0.22uF C96 0.22uF C93 0.22uF C92 0.22uF RP26 4x 4.
Appendix C Evaluation Board BOM Table C-1. MCF5282EVB BOM Item Qty Reference Part Function 1 32 C1,C3,C4,C5,C6,C17,C31, C32,C33,C35,C37,C38,C39, C40,C47,C48,C57,C59,C60, C64,C65,C69,C71,C75,C78, C80,C88,C89,C90,C91,C101, C103 0.
Table C-1.
Table C-1. MCF5282EVB BOM (continued) Item Qty Reference Part Function 46 2 R16,R7 SMT 10K resistor 47 2 R9,R8 SMT 180 resistor 48 4 R10,R17,R20,R22 SMT 4.
C-4 M5282EVB Reference Board User’s Manual MOTOROLA
