Datasheet

97
ATtiny25/45/85 [DATASHEET]
2586Q–AVR–08/2013
Figure 13-3. Timer/Counter1 Block Diagram
Two status flags (overflow and compare match) are found in the Timer/Counter Interrupt Flag Register - TIFR.
Control signals are found in the Timer/Counter Control Registers TCCR1 and GTCCR. The interrupt enable/dis-
able settings are found in the Timer/Counter Interrupt Mask Register - TIMSK.
The Timer/Counter1 contains two Output Compare Registers, OCR1A and OCR1C as the data source to be com-
pared with the Timer/Counter1 contents. In normal mode the Output Compare functions are operational with
OCR1A only. OCR1A determines action on the OC1A pin (PB1), and it can generate Timer1 OC1A interrupt in nor-
mal mode and in PWM mode. OCR1C holds the Timer/Counter maximum value, i.e. the clear on compare match
value. In the normal mode an overflow interrupt (TOV1) is generated when Timer/Counter1 counts from $FF to
$00, while in the PWM mode the overflow interrupt is generated when the Timer/Counter1 counts either from $FF
to $00 or from OCR1C to $00.
In PWM mode, OCR1A provides the data values against which the Timer Counter value is compared. Upon com-
pare match the PWM outputs (OC1A) is generated. In PWM mode, the Timer Counter counts up to the value
specified in the output compare register OCR1C and starts again from $00. This feature allows limiting the counter
“full” value to a specified value, lower than $FF. Together with the many prescaler options, flexible PWM frequency
selection is provided. Table 12-3 on page 88 lists clock selection and OCR1C values to obtain PWM frequencies
from 20 kHz to 250 kHz in 10 kHz steps and from 250 kHz to 500 kHz in 50 kHz steps. Higher PWM frequencies
can be obtained at the expense of resolution.
13.2.1 Timer/Counter1 in PWM Mode
When the PWM mode is selected, Timer/Counter1 and the Output Compare Register A - OCR1A form an 8-bit,
free-running and glitch-free PWM generator with output on the PB1(OC1A).
8-BIT DATABUS
TIMER INT. FLAG
REGISTER (TIFR)
TIMER/COUNTER1
8-BIT COMPARATOR
T/C1 OUTPUT
COMPARE REGISTER
TIMER INT. MASK
REGISTER (TIMSK)
TIMER/COUNTER1
(TCNT1)
T/C CLEAR
T/C1 CONTROL
LOGIC
TOV1
TOV1
TOIE0
TOIE1
OCIE1A
OCF1A
OCF1A
CK
PCK
T/C1 OVER-
FLOW IRQ
OC1A
(PB1)
T/C1 COMPARE
MATCH A IRQ
GLOBAL T/C CONTROL
REGISTER 2 (GTCCR)
PWM1A
FOC1A
(OCR1A) (OCR1C)
8-BIT COMPARATOR
T/C1 OUTPUT
COMPARE REGISTER
TOV0
COM1A1
COM1A0
T/C CONTROL
REGISTER 1 (TCCR1)
CS12
PSR1
CS11
CS10
CS13
CTC1