Datasheet
20
ATtiny25/45/85 [DATASHEET]
2586Q–AVR–08/2013
All ATtiny25/45/85 I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed by the
LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32 general purpose working registers
and the I/O space. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and
CBI instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instruc-
tions. Refer to the instruction set section for more details. When using the I/O specific commands IN and OUT, the
I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instruc-
tions, 0x20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory
addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will
only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The CBI
and SBI instructions work with registers 0x00 to 0x1F only.
The I/O and Peripherals Control Registers are explained in later sections.
5.5 Register Description
5.5.1 EEARH – EEPROM Address Register
• Bits 7:1 – Res: Reserved Bits
These bits are reserved for future use and will always read as zero.
• Bits 0 – EEAR8: EEPROM Address
This is the most significant EEPROM address bit of ATtiny85. In devices with less EEPROM, i.e.
ATtiny25/ATtiny45, this bit is reserved and will always read zero. The initial value of the EEPROM Address Regis-
ter (EEAR) is undefined and a proper value must therefore be written before the EEPROM is accessed.
5.5.2 EEARL – EEPROM Address Register
• Bit 7 – EEAR7: EEPROM Address
This is the most significant EEPROM address bit of ATtiny45. In devices with less EEPROM, i.e. ATtiny25, this bit
is reserved and will always read zero. The initial value of the EEPROM Address Register (EEAR) is undefined and
a proper value must therefore be written before the EEPROM is accessed.
• Bits 6:0 – EEAR[6:0]: EEPROM Address
These are the (low) bits of the EEPROM Address Register. The EEPROM data bytes are addressed linearly in the
range 0...(128/256/512-1). The initial value of EEAR is undefined and a proper value must be therefore be written
before the EEPROM may be accessed.
Bit 76543210
0x1F – – – – – – –EEAR8EEARH
Read/Write RRRRRRRR/W
Initial Value0000000X/0
Bit
0x1E EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 EEARL
Rear/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value XXXXXXXX