Instruction Manual

_________________________________________________________________________________________________________ 15-14
MAXQ7667 User’s Guide
15.6.2 Switchback Mode
T
he system clock is used to provide standard baud-rate generation for the external interface. However, the clock speed choice affects
all functional logic including timers and the baud-rate generator in the serial port module.
The switchback feature allows low-power operation and quick response to events that require full processing capacity. The switchback
f
unction is enabled by setting the SWB bit to logic 1. The switchback occurs whenever one of the following conditions occurs:
•
Detection of a selected edge transaction on any of the external interrupts when the respective pin has been programmed and
allowed to issue an interrupt.
• SPI activity:
°
SPIB is written in master mode (STBY = 1).
°
The SS signal is asserted in slave mode.
• Wake-up alarm from the system timer when enabled.
• Entry into active debug mode either by a breakpoint match or issuance of the debug command.
The switchback interrupt relationship requires that the respective external interrupt source be allowed to actually generate an interrupt
before the switchback will actually occur. An interrupt by SPI is not required, nor is the setting of the serial peripheral enable. Disabling
external interrupts and serial devices’ receive/transmission mode disables the automatic switchback mode. Clearing the SWB bit also
disables the switchback.