Owner's manual

2.2.3 Analog Interrupt Enable Register (AIE)

The AIE register is used to enable interrupts from a variety of analog sources including DVDDIO and DVDD brownout detection.

Bits 15 to 7 and 3: Reserved. Read 0, write ignored.

Bit 6: External High-Frequency Oscillator Failure Interrupt Enable (HFFIE). See

Section 5

for more information on this register bit.

Bit 5: I/O Voltage Brownout Interrupt Enable (VIOBIE). This bit must be set to logic 1 to generate an interrupt request when a

brownout condition is detected on the DVDDIO voltage and the VIOBI flag (in the ASR register) is set to logic 1. Clearing this bit to 0

disables the interrupt capability from the VIOBI flag. Note: To be acknowledged by the microcontroller interrupt logic, this interrupt

request must also be enabled by the IGE bit in the IC register and the IM5 mask in the IMR peripheral register.

Bit 4: Digital Brownout Interrupt Enable (DVBIE). This bit must be set to logic 1 to generate an interrupt request when a brownout

condition is detected on the DVDD voltage and the DVBI flag (in the ASR register) is set to logic 1. Clearing this bit to 0 disables the

interrupt capability from the DVBI flag. Note: To be acknowledged by the microcontroller interrupt logic, this interrupt request must also

be enabled by the IGE bit in the IC register and the IM5 mask in the IMR peripheral register.

Bit 2: ADC Overrun Interrupt Enable (AORIE). See

Section 3

for more information on this register bit.

Bit 1: ADC Data Ready Interrupt Enable (ADCIE). See

Section 3

for more information on this register bit.

Bit 0: This bit is implemented and available to be used as a user-software-controlled bit.

Bit #

15 14 13 12 11 10 9 8

Name — — — — — — — —

Reset 0 0 0 0 0 0 0 0

Access r r r r r r r r

Bit #

7 6 5 4 3 2 1 0

Name — HFFIE VIOBIE DVBIE — AORIE ADCIE —

Reset 0 0 0 0 0 0 0 1

Access r rw rw rw r rw rw rw

r = read, w = write

MAXQ7665/MAXQ7666 User’s Guide

2-9

Maxim Integrated