Datasheet

Maxim Integrated │ 27
MAX98090 Ultra-Low Power Stereo Audio Codec
www.maximintegrated.com
Digital Audio Interface Timing Characteristics
(V
AVDD
= V
HPVDD
= V
DVDDIO
= 1.8V, V
DVDD
= 1.2V, V
SPKLVDD
= V
SPKRVDD
= V
SPKVDD
= 3.7V. Receiver load (R
RCV
) connected
between RCVP/LOUTL and RCVN/LOUTR (LINMOD = 0). Line output loads (R
LOUT
) connected between from RCVP/LOUTL and
RCVN/LOUTR to GND (LINMOD = 1). Headphone loads (R
HP
) connected from HPL or HPR to GND. Speaker loads (Z
SPK
) connected
between SPK_P and SPK_N. R
RCV
= J, R
LOUT
= J, R
HP
= J, Z
SPK
= J. C
REF
= 2.2µF, C
BIAS
= C
MICBIAS
= 1µF, C
C1N-C1P
=
C
CPVDD
= C
CPVSS
= 1µF. A
V_MICPRE_
= A
V_MICPGA_
= A
V_LINEPGA_
= 0dB, A
V_ADCLVL
= A
V_ADCGAIN
= 0dB, A
V_DACLVL
=
A
V_DACGAIN
= 0dB, A
V_MIXGAIN
= 0dB, A
V_RCV
= A
V_LOUT
= A
V_HP
= A
V_SPK
= 0dB. f
MCLK
= 12.288MHz, f
LRCLK
= 48kHz, MAS =
0, 20-bit source data. T
A
= T
MIN
to T
MAX
unless otherwise noted. Typical values are at T
A
= +25°C.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL AUDIO INTERFACE TIMING CHARACTERISTICS
BCLK Cycle Time t
BCLK
Slave mode 80 ns
BCLK High Time t
BCLKH
Slave mode 20 ns
BCLK Low Time t
BCLKL
Slave mode 20 ns
BCLK or LRCLK Rise and
Fall Time
t
r
, t
f
Master mode, C
L
= 15pF 5 ns
SDIN to BCLK Setup Time t
SETUP
20 ns
LRCLK to BCLK Setup Time t
SYNCSET
Slave mode 20 ns
SDIN to BCLK Hold Time t
HOLD
20 ns
LRCLK to BCLK Hold Time t
SYNCHOLD
Slave mode 20 ns
Minimum Delay Time from LSB
BCLK Falling Edge to High-
Impedance State
t
HIZOUT
Master mode
TDM = 1 20
ns
TDM = 1, FSW = 1 20
TDM = 1, FSW = 0 20
TDM = 0, DLY = 1 20
LRCLK Rising Edge to
SDOUT MSB Delay
t
SYNCTX
C = 30pF, TDM = 1, FSW = 1 40 ns
BCLK to SDOUT Delay t
CLKTX
C = 30pF
TDM = 1, BCLK
rising edge
50
ns
TDM = 0 50
Delay Time from BCLK to LRCLK t
CLKSYNC
Master mode
TDM = 1 -15 +15
ns
TDM = 0
0.8 x
t
BCLK