Datasheet

MAX9217
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Serializer
14 ______________________________________________________________________________________
Board Layout
Separate the LVTTL/LVCMOS inputs and LVDS output to
prevent crosstalk. A four-layer PCB with separate layers
for power, ground, and signals is recommended.
ESD Protection
The MAX9217 ESD tolerance is rated for Human Body
Model, Machine Model, and ISO 10605. ISO 10605
specifies ESD tolerance for electronic systems. The
Human Body Model, Machine Model, discharge com-
ponents are C
S
= 100pF and R
D
= 1.5kΩ (Figure 14).
The ISO 10605 discharge components are C
S
= 330pF
and R
D
= 2kΩ (Figure 15). The Machine Model dis-
charge components are C
S
= 200pF and R
D
= 0Ω
(Figure 16).
Chip Information
PROCESS: CMOS
Figure 14. Human Body ESD Test Circuit
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
1MΩ
R
D
1.5kΩ
C
S
100pF
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
50Ω TO 100Ω
R
D
2kΩ
C
S
330pF
Figure 15. ISO 10605 Contact-Discharge ESD Test Circuit
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
R
D
0Ω
C
S
200pF
Figure 16. Machine Model ESD Test Circuit
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages
.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
48 LQFP C48+5
21-0054
48 TQFN T4866+1
21-0141