Datasheet

MAX807L/M/N
Full-Featured µP Supervisory Circuit with
±1.5% Reset Accuracy
4 _______________________________________________________________________________________
Note 1: Either V
CC
or V
BATT
can go to 0 if the other is greater than 2.0V.
Note 2: The supply current drawn by the MAX807 from the battery (excluding I
OUT
) typically goes to 15µA when (V
BATT
- 0.1V)
< V
CC
< V
BATT
. In most applications, this is a brief period as V
CC
falls through this region (see Typical Operating Characteristics).
Note 3: “+”= battery discharging current, “-”= battery charging current.
Note 4: WDI is internally connected to a voltage-divider between V
CC
and GND. If unconnected, WDI is driven to 1.8V (typical),
disabling the watchdog function.
Note 5: Overdrive (V
OD
) is measured from center of hysteresis band.
Note 6: The chip-enable resistance is tested with V
CE IN
= V
CC
/2, and I
CE IN
= 1mA.
Note 7: The chip-enable propagation delay is measured from the 50% point at CE IN to the 50% point at CE OUT.
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 4.60V to 5.5V for the MAX807L, V
CC
= 4.50V to 5.5V for the MAX807N, V
CC
= 4.35V to 5.5V for the MAX807M,
V
BATT
= 2.8V, V
PFI
= 0V, T
A
= T
MIN
to T
MAX
. Typical values are tested with V
CC
= 5V and T
A
= +25°C, unless otherwise noted.)
CONDITIONS UNITSMIN TYP MAXSYMBOLPARAMETER
PFI Leakage Current ±0.005 ±40 nA
mV20PFI Hysteresis
µA±0.00002 ±1CE IN Leakage Current Disabled mode, MR = 0V
µs14PFI to PFO Delay (Note 5)
PFI Input Threshold V
PFT
V
PFI
falling
2.22 2.285 2.35
V
2.20 2.265 2.33
RESET to CE OUT Delay V
CC
falling 28 µs
75 150
CE IN to CE OUT Resistance
(Note 6)
Enabled mode, V
CC
= V
RST
(max)
MR Minimum Pulse Input 1 µs
ns170
MR-to-RESET Propagation
Delay
mA17
CE OUT Short-Circuit Current
(RESET Active)
V
CC
= 5V, disabled mode,
CE OUT = 0, MR = 0V
ns28
CE IN to CE OUT
Propagation Delay (Note 7)
V
CC
= 5V, C
LOAD
= 50pF,
50source impedance driver
V
3.5
CE OUT Output Voltage High
(RESET Active)
Disabled mode, MR = 0V
MR Threshold
V
IH
2.4
V
BATT OK Threshold V
BOK
2.200 2.265 2.350 V
BATT OK Hysteresis 20 mV
Output Voltage
(PFO, BATT OK)
V
OL
I
SINK
= 3.2mA 0.4
V
Output Short-Circuit Current I
SC
Output sink current 35
mA
V
PFI
rising
V
BATT
- 0.1 V
BATT
V
CC
= 5V,
I
OUT
= 2mA
V
CC
= 0V,
I
OUT
= 10µA
V
IL
0.8
V
OH
I
SOURCE
= 5mA V
CC
- 1.5
Output source current 20
V
OD
= 30mV, V
PFI
falling
MR Pullup Current MR = 0V 50 100 200 µA
CHIP-ENABLE GATING
MANUAL RESET INPUT
BATT OK COMPARATOR
LOGIC OUTPUTS