Datasheet

MAX792/MAX820
Microprocessor and Nonvolatile
Memory Supervisory Circuits
_______________________________________________________________________________________ 7
______________________________________________________________Pin Description
PIN NAME FUNCTION
1
RESET
2 RESET
Reset is the inverse of RESET.
3V
CC
Input Supply Voltage
4
RESET IN/INT
5 LLIN/REF OUT
6
OVO
7OVI
8 SWT
9
MR
10
LOW LINE
11 WDI
12 GND Ground
13
CE OUT
Active-Low Reset Output goes low whenever V
CC
falls below the reset threshold in internal thresh-
old programming mode, or RESET IN falls below 1.30V in external threshold programming mode.
RESET remains low for 200ms typ after the threshold is exceeded on power-up.
Reset-Input/Internal-Mode Select. Connect this input to GND to select internal threshold mode.
Select external programming mode by pulling this input 600mV or higher through an external volt-
age divider.
Low-Line Input/Reference Output connects directly to the low-line comparator in external program-
ming mode (RESET IN/INT ≥ 600mV). Connects directly to the internal 1.30V reference in internal
threshold mode (RESET IN/INT ≤ 60mV).
Overvoltage Comparator Output goes low when OVI is greater than 1.30V. This is an uncommitted
comparator and has no effect on any other internal circuitry.
Inverting Input to the Overvoltage Comparator. When OVI is greater than 1.30V, OVO goes low.
Connect OVI to GND or V
CC
when not used.
Set Watchdog-Timeout Input. Connect this input to V
CC
to select the default 1.6sec watchdog
timeout period. Connect a capacitor between this input and GND to select another watchdog-
timeout period. Watchdog timeout period = k x (capacitor value in nF)mV, where k = 27 for
V
CC
= 5V and k = 16.2 for V
CC
= 3V. If the watchdog function is unused, connect SWT to V
CC
.
16
WDPO
15
WDO
14
CE IN
Manual-Reset Input. This input can be tied to an external momentary pushbutton switch, or to a
logic gate output. Internally pulled up to V
CC
.
Low-Line Output. LOW LINE goes low 120mV above the reset threshold in internal threshold mode,
or when LLIN/REFOUT goes below 1.30V in external programming mode.
Watchdog Input. If WDI remains either high or low for longer than the watchdog timeout period,
WDPO pulses low and WDO goes low. WDO remains low until the next transition at WDI. Connect to
GND or V
CC
if unused.
Chip-Enable Output. CE OUT goes low only when CE IN is low and reset is not asserted. If CE IN is
low when reset is asserted, CE OUT will stay low for 15µs or until CE IN goes high, whichever
occurs first.
Chip-Enable Input—the input to the chip-enable transmission gate. Connect to GND or V
CC
if not
used.
Watchdog Output. WDO goes low if WDI remains either high or low longer than the watchdog time-
out period. WDO returns high on the next transition at WDI.
Watchdog-Pulse Output. Upon the absence of a transition at WDI, WDPO will pulse low for a mini-
mum of 500µs. WDPO precedes WDO by typically 70ns.