Datasheet

It is acceptable to clock more than 16 bits into the
MAX6957 between taking CS low and taking CS high
again. In this case, only the last 16 bits clocked into the
MAX6957 are retained.
Reading Device Registers
Any register data within the MAX6957 may be read by
sending a logic high to bit D15. The sequence is:
1) Take SCLK low.
2) Take CS low (this enables the internal 16-bit shift reg-
ister).
3) Clock 16 bits of data into DIN—D15 first to D0 last.
D15 is high, indicating a read command and bits D14
through D8 containing the address of the register to
be read. Bits D7–D0 contain dummy data, which is
discarded.
4) Take CS high (either while SCLK is still high after
clocking in the last data bit, or after taking SCLK low),
positions D7 through D0 in the Shift register are now
loaded with the register data addressed by bits D1
through D8.
5) Take SCLK low (if not already low).
6) Issue another read or write command (which can
be a No-Op), and examine the bit stream at DOUT;
the second 8 bits are the contents of the register
addressed by bits D1 through D8 in step 3.
Initial Power-Up
On initial power-up, all control registers are reset, cur-
rent registers are set to minimum value, and the
MAX6957 enters shutdown mode (Table 4).
LED Current Control
LED segment drive current can be set either globally or
individually. Global control simplifies the operation when
all LEDs are set to the same current level, because
writing one register, the Global Current register, sets the
current for all ports configured as LED segment drivers.
It is also possible to individually control the current drive
of each LED segment driver. Individual/global brightness
control is selected by setting the configuration register I
bit (Table7). The global current register (0x02) data are
then ignored, and segment currents are set using register
addresses 0x12 through 0x1F (Tables 10, 11, and 12).
Each segment is controlled by a nibble of one of the 16
current registers.
Transition (Port Data Change) Detection
Port transition detection allows any combination of the
seven ports P24–P30 to be continuously monitored
for changes in their logic status (Figure 6). A detected
change is flagged on port P31, which is used as an
active-high interrupt output (INT). Note that the MAX6957
does not identify which specific port(s) caused the inter-
rupt, but provides an alert that one or more port levels
have changed.
The mask register contains 7 mask bits that select which
of the seven ports P24–P30 are to be monitored (Table
13). Set the appropriate mask bit to enable that port for
transition detect. Clear the mask bit if transitions on that
port are to be ignored. Transition detection works regard-
less of whether the port being monitored is set to input or
output, but generally it is not particularly useful to enable
transition detection for outputs.
Port P31 must be configured as an output in order to work
as the interrupt output INT when transition detection is
used. Port P31 is set as output by writing bit D7 = 0 and
bit D6 = 1 to the port configuration register (Table 1).
To use transition detection, first set up the mask register
and configure port P31 as an output, as described above.
Then enable transition detection by setting the M bit in
the configuration register (Table 8). Whenever the config-
uration register is written with the M bit set, the MAX6957
updates an internal 7-bit snapshot register, which holds
the comparison copy of the logic states of ports P24
through P30. The update action occurs regardless of the
previous state of the M bit, so that it is not necessary to
clear the M bit and then set it again to update the snap-
shot register.
When the configuration register is written with the M bit
set, transition detection is enabled and remains enabled
until either the configuration register is written with the M
bit clear, or a transition is detected. The INT output port
P31 goes low, if it was not already low.
Once transition detection is enabled, the MAX6957 con-
tinuously compares the snapshot register against the
changing states of P24 through P31. If a change on any
of the monitored ports is detected, even for a short time
(like a pulse), INT output port P31 is latched high. The INT
output is not cleared if more changes occur or if the data
pattern returns to its original snapshot condition. The only
way to clear INT is to access (read or write) the transition
detection mask register (Table 13).
Transition detection is a one-shot event. When INT has
been cleared after responding to a transition event, tran-
sition detection is automatically disabled, even though
the M bit in the configuration register remains set (unless
cleared by the user). Reenable transition detection by
writing the configuration register with the M bit set to take
a new snapshot of the seven ports, P24 to P30.
www.maximintegrated.com
Maxim Integrated │ 10
MAX6957 4-Wire-Interfaced, 2.5V to 5.5V, 20-Port and
28-Port LED Display Driver and I/O Expander