Datasheet

*Dice are specified at T
A
= +25°C
**Contact factory for availability and processing to MIL STD-
883. Devices in PDIP and SO packages are available in both
leaded and lead(Pb)-free packaging. Specify lead free by
adding the + symbol at the end of the part number when
ordering. Lead free not available for CERDIP package.
PART TEMP RANGE PIN-PACKAGE
MAX692ACPA 0°C to +70°C 8 Plastic DIP
MAX692ACSA 0°C to +70°C 8 SO
MAX692AC/D 0°C to +70°C Dice*
MAX692AEPA -40°C to +85°C 8 Plastic DIP
MAX692AESA -40°C to +85°C 8 SO
MAX692AMJA -55°C to +125°C 8 CERDIP**
MAX802LCPA 0°C to +70°C 8 Plastic DIP
MAX802LCSA 0°C to +70°C 8 SO
MAX802LEPA -40°C to +85°C 8 Plastic DIP
MAX802LESA -40°C to +85°C 8 SO
MAX802MCPA 0°C to +70°C 8 Plastic DIP
MAX802MCSA 0°C to +70°C 8 SO
MAX802MEPA -40°C to +85°C 8 Plastic DIP
MAX802MESA -40°C to +85°C 8 SO
MAX805LCPA 0°C to +70°C 8 Plastic DIP
MAX805LCSA 0°C to +70°C 8 SO
MAX805LC/D 0°C to +70°C Dice*
MAX805LEPA -40°C to +85°C 8 Plastic DIP
MAX805LESA -40°C to +85°C 8 SO
MAX805LMJA -55°C to +125°C 8 CERDIP**
RESET (RESET)
GND
V
BATT
PFI
0.061"
(1.55mm)
0.078"
(1.98mm)
( ) ARE FOR MAX805L ONLY.
TRANSISTOR COUNT: 573;
SUBSTRATE MUST BE LEFT UNCONNECTED.
WDI
PFO
V
CC
V
OUT
MAX690A/MAX692A/
MAX802L/MAX802M/
MAX805L
Microprocessor Supervisory Circuits
www.maximintegrated.com
Maxim Integrated │ 12
Ordering Information (continued)
For the latest package outline information and land patterns, go
to www.maximintegrated.com/packages. Note that a “+”, “#”,
or “-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package Information
PACKAGE
TYPE
PACKAGE e
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 PDIP P8+1 21-0043 —
8 CDIP J8+2 21-0045 —
8 SOIC S8+2 21-0041 90-0096
Chip Topography