Datasheet

MAX6791–MAX6796
High-Voltage, Micropower, Single/Dual Linear
Regulators with Supervisory Functions
20 ______________________________________________________________________________________
Use the following formulas to determine the high/low
threshold levels and the hysteresis:
V
L-H
= V
PFI
x (1 + R5 / R6 +R5 / R7)
V
H-L
= V
PFI
x (1 + R5 / R6 ) + (V
PFI
- V
TERM
) [R5 / (R7 +
R8)]
V
HYS
= V
PFI
x (R5 / R7 ) - (V
PFI
- V
TERM
) [R5 / (R7 +
R8)]
where V
L-H
is the threshold level for the monitored volt-
age rising and V
H-L
is the threshold level for the moni-
tored voltage falling.
Chip Information
PROCESS: BiCMOS
Table 2. Preset Timeout Period
PART
SUFFIX (_)
RESET TIMEOUT PERIOD
(NOMINAL)
D0 35µs
D1 3.125ms
D2 12.5ms
D3 50ms
D4 200ms
Table 1. Preset Output Voltage and Reset
Threshold
PART
SUFFIX (_)
OUTPUT
VOLTAGE (V)
RESET THRESHOLD
(NOMINAL)
L 5.0 4.625
M 5.0 4.375
T 3.3 3.053
S 3.3 2.888
Z 2.5 2.313
Y 2.5 2.188
W 1.8 1.665
V 1.8 1.575
OPERATING
STATE
ENABLE1/
ENABLE
HOLD
REGULATOR 1
OUTPUT
COMMENT
Initial state Low Don’t care Off
ENABLE/ENABLE1 is pulled to GND through internal pulldown.
OUT/OUT1 is disabled.
Turn-on state High Don’t care On
ENABLE/ENABLE1 is externally driven high turning OUT/OUT1
on. HOLD is pulled up to OUT/OUT1.
Hold setup state High Low On
HOLD is externally pulled low while ENABLE/ENABLE1 remains
high, and the regulator latches on.
Hold state Low Low On
ENABLE/ENABLE1 is driven low (or allowed to float low by an
internal pulldown). HOLD remains externally pulled low keeping
OUT/OUT1 on.
Off state Low High Off
HOLD is driven high (or pulled high by the internal pullup) while
ENABLE/ENABLE1 is low. OUT/OUT1 is turned off and
ENABLE/ENABLE1 and HOLD logic returns to the initial state.
Table 3. ENABLE/ENABLE1 and HOLD Truth Table/State Table