Datasheet

a microprocessor for general-purpose I/O control. MR2
monitors a switch to detect when a smart card is
inserted. When the switch is closed high (card inserted),
RESET one-shot pulses low for 140ms. MR2 is internally
debounced for 210ms to prevent false resets when the
smart card is removed.
Interfacing to Other Voltages
for Logic Compatibility
The open-drain RESET output can be used to interface
to a µP with other logic levels. As shown in Figure 8, the
open-drain output can be connected to voltages from 0
to 6V.
Generally, the pullup resistor connected to the RESET
connects to the supply voltage that is being monitored
at the IC’s V
CC
pin. However, some systems may use
the open-drain output to level-shift from the monitored
supply to reset circuitry powered by some other supply
(Figure 8). Keep in mind that as the supervisor’s V
CC
decreases toward 1V, so does the IC’s ability to sink
current at RESET. RESET is pulled high as V
CC
decays
toward 0. The voltage where this occurs depends on
the pullup resistor value and the voltage to which it is
connected.
Ensuring a Valid RESET Down to
V
CC
= 0V (Push-Pull RESET)
When V
CC
falls below 1V, RESET current-sinking capabil-
ities decline drastically. The high-impedance CMOS-logic
inputs connected to RESET can drift to undetermined
voltages. This presents no problems in most applications,
because most µPs and other circuitry do not operate with
V
CC
below 1V.
In applications in which RESET must be valid down to 0V,
add a pulldown resistor between RESET and GND for the
push-pull outputs. The resistor sinks any stray leakage
currents, holding RESET low (Figure 9). The value of the
pulldown resistor is not critical; 100kW is large enough
not to load RESET and small enough to pull RESET to
ground. The external pulldown cannot be used with the
open-drain reset outputs.
Transient Immunity
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervi-
sors are relatively immune to short-duration falling tran-
sients (glitches). The graph Maximum Transient Duration
vs. Reset Threshold Overdrive in the Typical Operating
Characteristics section shows this relationship.
Figure 8. Interfacing to Other Voltage Levels
Figure 7. MAX6451/MAX6452 Application Circuit
MAX6444
MAX6446
MAX6448
MAX6450
MAX6452
µ
P
RESET
RESET
GND
V
CC
5V
3.3V
100kΩ
N
MAX6451
µP
V
CC
RSTIN
RESET
DIGITAL INPUT
I/O SUPPLY
CORE SUPPLY
+3.3V
+1.5V
RESET
MR1
MR2
GND
FRONT-PANEL SWITCH
STANDARD µP INPUT
AND t
MR
MANUAL
RESET DELAY
SMART CARD DETECT:
IMMEDIATE ONE-SHOT
WHEN MANUAL
RESET CLOSES
MAX6443–MAX6452 µP Reset Circuits with Long Manual Reset
Setup Period
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