Datasheet

MAX5703/MAX5704/MAX5705
Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output
Voltage DACs with Internal Reference and SPI Interface
17Maxim Integrated
CODE Command
The CODE command (B[23:20] = 1000) updates the
CODE register content for the DAC. Changes to the
CODE register content based on this command will not
affect the DAC output directly unless the LDAC input
is in a low state. Otherwise, a subsequent hardware
or software LOAD operation will be required to move
this content to the active DAC latch. This command is
gated when CLR is asserted, updates to this register are
ignored while the register is being cleared. See Table
1 and Table 2.
LOAD Command
The LOAD command (B[23:20] = 1001) updates the DAC
latch register content by uploading the current contents
of the CODE register. This command is gated when CLR
is asserted, updates to this register are ignored while the
register is being cleared. See Table 2.
CODE_LOAD Command
The CODE_LOAD command (B[23:20] = 1010 and 1011)
updates the CODE register contents as well as the DAC
register content of the DAC. This command is gated
when CLR is asserted, updates to these registers are
ignored while the register is being cleared. See Table 1
and Table 2.
Figure 2. Typical SPI Application Circuit
Table 1. DAC Data Bit Positions
PART B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
MAX5703 D7 D6 D5 D4 D3 D2 D1 D0 X X X X X X X X
MAX5704 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X X X
MAX5705 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X X X X
MAX5703
MAX5704
MAX5705
CS
SCLK
DIN
CS
SCLK
DIN
*
*
DOUT
CSCSB3
CSB2
MISO
SCLK
DIN
*ADDITIONAL SPI DEVICE
CSB1
SCLK
MOSI
µC