Datasheet

MAX5251
+3V, Quad, 10-Bit Voltage-Output DAC
with Serial Interface
8 _______________________________________________________________________________________
_______________Detailed Description
The MAX5251 contains four voltage-output digital-to-
analog converters (DACs) that are easily addressed
using a simple 3-wire serial interface. It includes a
16-bit data-in/data-out shift register, and each DAC has
a doubled-buffered input composed of an input register
and a DAC register (see Functional Diagram). In addi-
tion to the four voltage outputs, each amplifier’s nega-
tive input is available to the user.
The DACs are inverted R-2R ladder networks that con-
vert a digital input (10 data bits plus 2 sub-bits) into
equivalent analog output voltages in proportion to the
applied reference voltage inputs. DACs A and B share
the REFAB reference input, while DACs C and D share
the REFCD reference input. The two reference inputs
allow different full-scale output voltage ranges for each
pair of DACs. Figure 1 shows a simplified circuit dia-
gram of one of the four DACs.
Reference Inputs
The two reference inputs accept positive DC and AC
signals. The voltage at each reference input sets the
full-scale output voltage for its two corresponding
DACs. The reference input voltage range is 0V to
(V
DD
- 1.4V). The output voltages (V
OUT_)
are repre-
sented by a digitally programmable voltage source as:
V
OUT_
= (V
REF
x NB / 1024 ) x Gain
where NB is the numeric value of the DAC’s binary
input code (0 to 1023), V
REF
is the reference voltage,
and Gain is the externally set voltage gain.
The impedance at each reference input is code depen-
dent, ranging from a low value of 10kΩ when both
DACs connected to the reference have an input code
of 554 hex, to a high value exceeding several giga
ohms (leakage current) with an input code of 000 hex.
Because the input impedance at the reference pins is
code dependent, load regulation of the reference
source is important.
The REFAB and REFCD reference inputs have a 10kΩ
guaranteed minimum input impedance. When the two
reference inputs are driven from the same source, the
effective minimum impedance is 5kΩ. Driving the
REFAB and REFCD pins separately improves reference
accuracy.
In shutdown mode, the MAX5251’s REFAB and REFCD
inputs enter a high-impedance state with a typical input
leakage current of 0.01µA.
The reference input capacitance is also code depen-
dent and typically ranges from 20pF with an input code
of all 0s to 100pF at full scale.
Output Amplifiers
All MAX5251 DAC outputs are internally buffered by pre-
cision amplifiers with a typical slew rate of 0.6V/µs.
Access to each output amplifier’s inverting input pro-
vides the user greater flexibility in output gain setting/
signal conditioning (see the Applications Information
section).
With a full-scale transition at the MAX5251 output, the
typical settling time to ±1/2LSB is 12µs when loaded
with 5kΩ in parallel with 100pF (loads less than 2kΩ
degrade performance).
The MAX5251 output amplifier’s output dynamic
responses and settling performances are shown in the
Typical Operating Characteristics.
Power-Down Mode
The MAX5251 features a software-programmable shut-
down that reduces supply current to a typical value of
3µA. The power-down lockout pin (PDL) must be high to
enable shutdown mode. Writing 1100XXXXXXXXXXXX as
the input-control word puts the MAX5251 in shutdown
mode (Table 1).
OUT_
FB_
SHOWN FOR ALL 1s ON DAC
S0 S1 D0
D9
2R
2R 2R 2R 2R
RRR
REF_
AGND
Figure 1. Simplified DAC Circuit Diagram