Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) SSOP 24

_______________General Description

The MAX520/MAX521 are quad/octal, 8-bit voltage-output

digital-to-analog converters (DACs) with simple 2-wire ser-

ial interfaces that allow communication between multiple

devices. They operate from a single +5V supply and their

reference input range includes both supply rails.

The MAX521 includes rail-to-rail output buffer amplifiers for

reduced system size and component count when driving

loads. The MAX520’s unbuffered voltage outputs reduce

the device’s total supply current to 4µA and provide

increased accuracy at low output currents.

The MAX520/MAX521 feature a serial interface and internal

software protocol, allowing communication at data rates up

to 400kbps. The interface, combined with the double-

buffered input configuration, allows the DAC registers to be

updated individually or simultaneously. In addition, the

devices can be put into a low-power shutdown mode that

reduces supply current to 4µA. Power-on reset ensures the

DAC outputs are at 0V when power is initially applied.

The MAX520 is available in 16-pin DIP and wide SO pack-

ages, as well as a space-saving 20-pin SSOP. The

MAX521 comes in 20-pin DIP and 24-pin SO packages, as

well as a space-saving 24-pin SSOP.

________________________Applications

Minimum Component Analog Systems

Digital Offset/Gain Adjustment

Industrial Process Control

Automatic Test Equipment

Programmable Attenuators

____________________________Features

♦ Single +5V Supply

♦ Simple 2-Wire Serial Interface

♦ I

C Compatible

♦ Outputs Swing Rail to Rail:

Unbuffered Outputs (MAX520)

Buffered Outputs (MAX521)

♦ 1%-Accurate Trimmed Output Resistance (MAX520A)

♦ Ultra-Low 4µA Supply Current (MAX520)

♦ Individual DACs Have Separate Reference Inputs

♦ Power-On Reset Clears All Latches

♦ 4µA Power-Down Mode

MAX520/MAX521

Quad/Octal, 2-Wire Serial 8-Bit DACs

with Rail-to-Rail Outputs

________________________________________________________________

Maxim Integrated Products

OUT1



OUT2



OUT3



REF2

REF3



AD2

AD1



AD0

OUT0



REF1



REF0



AGND



DGND



SCL



SDA



TOP VIEW

MAX520

DIP/SO

_________________Pin Configurations

INPUT

LATCH 0

8-BIT

SHIFT REGISTER

SCL REF0SDA REF1

OUTPUT

LATCH 0

DAC0

OUT0

MAX520

ADDRESS

COMPARATOR

START/STOP

DETECTOR

DECODE

OUTPUT

LATCH 1

DAC1

OUT1

INPUT

LATCH 2

OUTPUT

LATCH 2

DAC2

OUT2

OUT3

INPUT

LATCH 3

OUTPUT

LATCH 3

DAC3

REF3REF2AD2

AD1

AD0

INPUT

LATCH 1

_______________Functional Diagrams

______________Ordering Information

For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800

19-0378; Rev 3; 9/96

PART

†

MAX520ACPE

MAX520BCPE

MAX520ACWE 0°C to +70°C

0°C to +70°C

TEMP. RANGE PIN-PACKAGE

16 Plastic DIP

16 Wide SO

TUE

(LSB)

Pin Configurations continued at end of data sheet.

Functional Diagrams continued at end of data sheet.

MAX520BCWE 0°C to +70°C 16 Wide SO 1

Ordering Information continued at end of data sheet.

†

MAX520 “A” grade parts include a 1%-accurate, factory-trimmed

output resistance.

Summary of content (20 pages)

PAGE 1
9-0378; Rev 3; 9/96 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs The MAX520/MAX521 are quad/octal, 8-bit voltage-output digital-to-analog converters (DACs) with simple 2-wire serial interfaces that allow communication between multiple devices. They operate from a single +5V supply and their reference input range includes both supply rails. The MAX521 includes rail-to-rail output buffer amplifiers for reduced system size and component count when driving loads.
PAGE 2
MAX520/MAX521 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs ABSOLUTE MAXIMUM RATINGS VDD to DGND ...........................................................-0.3V to +6V VDD to AGND............................................................-0.3V to +6V OUT_ ..........................................................-0.3V to (VDD + 0.3V) REF_ ...........................................................-0.3V to (VDD + 0.3V) AD0, AD1, AD2...........................................-0.
PAGE 3
Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs (VDD = 5V ±10%, VREF_ = 4V, RL = ∞ (MAX520), RL = 10kΩ (MAX521), CL = 0pF (MAX520), CL = 100pF (MAX521), TA = TMIN to TMAX, unless otherwise noted.
PAGE 4
MAX520/MAX521 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs ELECTRICAL CHARACTERISTICS (continued) (VDD = 5V ±10%, VREF_ = 4V, RL = ∞ (MAX520), RL = 10kΩ (MAX521), CL = 0pF (MAX520), CL = 100pF (MAX521), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE Voltage Output Slew Rate MAX521_C 1.0 Positive and negative MAX521_E 0.7 MAX521BM V/µs 0.
PAGE 5
Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs MAX520/MAX521 TIMING CHARACTERISTICS (VDD = 5V ±10%, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL Serial Clock Frequency Bus Free Time Between a STOP and a START Condition Hold Time, (Repeated) Start Condition CONDITIONS MIN TYP MAX UNITS 400 kHz fSCL 0 tBUF 1.3 µs tHD, STA 0.6 µs Low Period of the SCL Clock tLOW 1.3 µs High Period of the SCL Clock tHIGH 0.
PAGE 6
MAX520/MAX521 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs ______________________________Typical Operating Characteristics (continued) (VDD = 5V, DAC outputs unloaded, TA = +25°C, unless otherwise noted.
PAGE 7
Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs ALL DAC CODES FF HEX 6 4 MAX520/521-10 5 10 ALL REFERENCE INPUTS DRIVEN 8 4 ICC (mA) ICC (mA) 8 VDD = 5.5V ALL REF INPUTS = 0.6V ALL DIGITAL INPUTS to VDD MAX520/521-09 10 6 SHUTDOWN ICC (µA) VDD = 5.5V ALL REF INPUTS = 0.6V ALL DIGITAL INPUTS to VDD MAX520/521-08 12 MAX521 SUPPLY CURRENT vs. REFERENCE VOLTAGE MAX521 SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE MAX521 SUPPLY CURRENT vs.
PAGE 8
MAX520/MAX521 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs ______________________________Typical Operating Characteristics (continued) (VDD = 5V, DAC outputs unloaded, TA = +25°C, unless otherwise noted.
PAGE 9
Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs PIN MAX520 MAX521 NAME FUNCTION DIP/SO SSOP DIP SO/SSOP 1 1 1 1 OUT1 DAC1 Voltage Output 2 2 2 2 OUT0 DAC0 Voltage Output 3 3 3 3 REF1 Reference Voltage Input for DAC1 4 5 4 4 REF0 Reference Voltage Input for DAC0 — 4, 7, 14, 17 — 7, 9, 16, 20 N.C.
PAGE 10
MAX520/MAX521 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs _______________Detailed Description Serial Interface The MAX520/MAX521 use a simple 2-wire serial interface requiring only two I/O lines (2-wire bus) of a standard microprocessor (µP) port. Figure 1 shows the timing diagram for signals on the 2-wire bus. Figure 2 shows the typical application of the MAX520/MAX521. The 2-wire bus can have several devices (in addition to the MAX520/MAX521) attached.
PAGE 11
Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs Slave Address The MAX520/MAX521 each have a 7-bit-long slave address (Figure 5). The first four bits (MSBs) of the slave address have been factory programmed and are always 0101. In addition, the MAX521 has the next bit factory programmed to 0. The logic state of the address input pins (AD0, AD1, and AD2 of the MAX520; AD0 and AD1 of the MAX521) determine the least significant bits of the 7-bit slave address.
PAGE 12
MAX520/MAX521 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs 0 OR AD2 0 1 0 1 AD1 AD0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 0 SDA ADDRESS BYTE START CONDITION 1 1 1 1 1 COMMAND BYTE (ADDRESSING DAC0) ACK ACK OUTPUT BYTE (FULL SCALE) ACK ( 1 1 1 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 COMMAND BYTE (ADDRESSING DAC1) DAC0 INPUT LATCH SET TO FULL SCALE 0 0 0 ACK ) 0 SDA ACK OUTPUT BYTE (FULL SCALE) ( COMMAND BYTE (ADDRESSIN
PAGE 13
Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs 0 1 0 1 AD1 AD0 0 0 (RST) 0 0 0 1 0 0 X SDA ADDRESS BYTE ( 0 OR AD2 0 1 0 1 AD1 AD0 0 0 0 0 ACK ) ALL INPUT LATCHES SET TO 0 (RST) 0 1 0 ADDRESS BYTE ACK START CONDITION NOTE: X = DON'T CARE STOP CONDITION ( ALL OUTPUTS SET TO 0 ) 0 X SDA X COMMAND BYTE ACK START CONDITION (b) X X COMMAND BYTE ( X 0 X X X X X X X X ALL INPUT LATCHES SET TO 0 ACK ADDITIONAL COMMAND BYTE/ OUTPUT BYTE PAIRS "DUMMY" OUTPUT BYT
PAGE 14
MAX520/MAX521 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 1 1 1 1 1 0 0 1 0 1 0 0 1 0 0 SDA ADDRESS BYTE (DEVICE 0) START CONDITION ACK COMMAND BYTE ADDRESSING DAC1 OUTPUT BYTE (FULL SCALE) ACK ( 0 0 0 0 0 0 1 0 0 1 1 1 1 1 1 1 1 ADDRESS BYTE (DEVICE 1) ACK DEVICE 0's DAC1 INPUT LATCH SET TO FULL SCALE ) ACK REPEATED START CONDITION 0 SDA COMMAND BYTE (ADDRESSING DAC2) OUTPUT BYTE (
PAGE 15
Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs OUT_ (MAX521) R 2R R R 2R 2R 2R 2R D0 D5 D6 D7 OUT_ (MAX520) REF_ AGND SHOWN FOR ALL 1s ON DAC Figure 14. DAC Simplified Circuit Diagram (RIN) is code dependent, it must be driven by a circuit with low output impedance (no more than RIN ÷ 2000) to maintain output linearity.
PAGE 16
MAX520/MAX521 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs RF RIN RT DAC RF RIN DAC (1%) 16kΩ (1%) MAX520A Figure 15a. Typical Trimming Circuit Figure 15b. MAX520A Trimming Circuit __________Applications Information SYSTEM GND Shutdown Mode In shutdown mode, the MAX520/MAX521 reference inputs are disconnected from the R-2R ladder inputs, which saves power when the reference is not powered down.
PAGE 17
Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs TOP VIEW OUT1 1 20 OUT2 OUT1 1 20 OUT2 OUT1 1 24 OUT2 OUT0 2 19 OUT3 OUT0 2 19 OUT3 OUT0 2 23 OUT3 REF1 3 18 REF2 REF1 3 18 REF2 REF1 3 22 REF2 17 REF3 REF0 4 21 REF3 N.C. 4 REF0 5 MAX520 AGND 6 17 N.C. REF0 4 16 REF3 DGND 5 16 REF4 DGND 5 15 VDD AGND 6 15 VDD AGND 6 18 VDD MAX521 MAX521 20 N.C. 19 REF4 N.C. 7 14 N.C. SCL 7 14 AD1 N.C.
PAGE 18
MAX520/MAX521 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs __Ordering Information (continued) † _________________Chip Topographies MAX520 TUE (LSB) PART TEMP.
PAGE 19
Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs D E DIM E1 A A1 A2 A3 B B1 C D1 E E1 e eA eB L A3 A A2 L A1 0° - 15° C e B1 eA B eB D1 Plastic DIP PLASTIC DUAL-IN-LINE PACKAGE (0.300 in.) INCHES MAX MIN 0.200 – – 0.015 0.175 0.125 0.080 0.055 0.022 0.016 0.065 0.045 0.012 0.008 0.080 0.005 0.325 0.300 0.310 0.240 – 0.100 – 0.300 0.400 – 0.150 0.115 PKG. DIM PINS P P P P P N D D D D D D 8 14 16 18 20 24 INCHES MIN MAX 0.348 0.390 0.735 0.765 0.745 0.765 0.885 0.915 1.015 1.
PAGE 20
MAX520/MAX521 Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs ___________________________________________Package Information (continued) DIM α E H C L A A1 B C D E e H L α INCHES MILLIMETERS MIN MAX MIN MAX 0.068 0.078 1.73 1.99 0.002 0.008 0.05 0.21 0.010 0.015 0.25 0.38 0.004 0.008 0.09 0.20 SEE VARIATIONS 0.205 0.209 5.20 5.38 0.0256 BSC 0.65 BSC 0.301 0.311 7.65 7.90 0.025 0.037 0.63 0.