Datasheet

MAX4651/MAX4652/MAX4653
Low-Voltage, 4Ω, Quad, SPST,
CMOS Analog Switches
_______________________________________________________________________________________ 9
t
r
< 5ns
t
f
< 5ns
50%
0
LOGIC
INPUT
R
L
300Ω
NO_
OR NC_
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
O
= V
COM (
R
L
)
R
L
+ R
ON
SWITCH
INPUT
IN_
V
IH
+ 0.5
t
OFF
0
COM_
SWITCH
OUTPUT
90% 90%
t
ON
V
O
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
C
L
35pF
V+
V
O
V
COM_
REPEAT TEST FOR EACH SWITCH. FOR LOAD
CONDITIONS, SEE Electrical Characteristics.
MAX4651
MAX4652
MAX4653
Figure 2. Switching-Time Test Circuit
V
GEN
GND
NC_
OR NO_
C
L
V
O
V+
V
O
V
IN
OFF
ON
OFF
∆V
O
Q = (∆V
O
)(C
L
)
COM_
V
IN
DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
V
IN
V
IN
V+
R
GEN
IN_
MAX4651
MAX4652
MAX4653
Figure 3. Charge-Injection Test Circuit
Timing Diagrams/Test Circuits