Datasheet

MAX4635/MAX4636
Fast, Low-Voltage, Dual 4Ω SPDT
CMOS Analog Switches
_______________________________________________________________________________________ 7
t
r
< 5ns
t
f
< 5ns
50%
0
V
IH
+ 0.5V
t
OFF
0
0.9
✕
V
0UT
0.9
✕
V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
MAX4635/MAX4636
LOGIC
INPUT
R
L
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_ or NC_
IN_
NC_ or NO_
V
OUT
V+
V+
C
L
V
IN
COM_
Figure 1a. Switching Time
50%
V
IH
+ 0.5V
0
LOGIC
INPUT
V
OUT
0.9
✕
V
OUT
t
D
MAX4635/MAX4636
LOGIC
INPUT
R
L
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_ or NC_
IN_
NC_ or NO_
V
OUT
V+
V+
C
L
V
IN
COM_
t
r
< 5ns
t
f
< 5ns
Figure 1b. Break-Before-Make Interval
V
GEN
GND
COM_
C
L
V
OUT
V+
V
OUT
IN
OFF
ON
OFF
∆V
OUT
Q = (∆V
OUT
)(C
L
)
NC_
OR NO_
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
V
INL
TO V
INH
V+
R
GEN
IN
MAX4635/MAX4636
Figure 2. Charge Injection