Datasheet

a small-signal diode (D1) as shown in Figure 1. If the
analog signal can dip below GND, add D2. Adding
protection diodes reduces the analog range to a diode
drop (about 0.7V) below V+ (for D1), and a diode drop
above ground (for D2). On-resistance increases slightly
at low supply voltages. Maximum supply voltage (V+)
must not exceed +6V.
Adding protection diode D2 causes the logic threshold
to be shifted relative to GND. TTL compatibility is not
guaranteed when D2 is added.
Protection diodes D1 and D2 also protect against some
overvoltage situations. With Figure 1’s circuit, if the sup-
ply voltage is below the absolute maximum rating, and
if a fault voltage up to the absolute maximum rating is
applied to an analog signal pin, no damage will result.
MAX4624/MAX4625
1Ω, Low-Voltage, Single-Supply
SPDT Analog Switches
_______________________________________________________________________________________ 7
t
r
< 5ns
t
f
< 5ns
50%
V
INL
LOGIC
INPUT
R
L
50Ω
COM
GND
IN
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
N_ (
R
L
)
R
L
+ R
ON
V
IN_
V
INH
t
OFF
0V
NO
OR NC
0.9 · V
0UT
0.9 · V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
C
L
35pF
V+
V
OUT
MAX4624
MAX4625
Figure 2. Switching Time
Test Circuits/Timing Diagrams
50%
V
INH
V
INL
LOGIC
INPUT
V
OUT
0.9 · V
OUT
t
D
LOGIC
INPUT
R
L
50Ω
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO
IN
NC
V
OUT
V+
V+
C
L
35pF
V
N_
COM
MAX4624
Figure 3a. Break-Before-Make Interval (MAX4624 only)