Datasheet

MAX4541–MAX4544
Low-Voltage, Single-Supply
Dual SPST/SPDT Analog Switches
8 _______________________________________________________________________________________
V
GEN
GND
COM
C
L
V
OUT
V+
V
OUT
IN
OFF
ON
OFF
ΔV
OUT
Q = (ΔV
OUT
)(C
L
)
NC
OR NO
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
V
IN
= +3V
V+
R
GEN
IN_
MAX4541
MAX4542
MAX4543
MAX4544
Figure 4. Charge Injection
50%
0.9
x V
0UT1
+3V
0
0
LOGIC
INPUT
SWITCH
OUTPUT 2
(V
OUT2
)
0
0.9 x V
OUT2
t
D
t
D
LOGIC
INPUT
R
L2
300Ω
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NC2
IN2
IN1
NO1
V
OUT2
V+
V+
C
L2
35pF
+3V
R
L1
300Ω
V
OUT1
C
L1
35pF
COM1
COM2
SWITCH
OUTPUT 1
(V
OUT1
)
MAX4543
50%
+3V
0
LOGIC
INPUT
SWITCH
OUTPUT
(V
OUT
)
0.9 x V
OUT
t
D
LOGIC
INPUT
R
L
300Ω
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO
IN
NC
V
OUT
V+
V+
C
L
35pF
+3V
COM
MAX4544
Figure 3a. Break-Before-Make Interval (MAX4543 Only)
Figure 3b. Break-Before-Make Interval (MAX4544 Only)
_________________________________Test Circuits/Timing Diagrams (continued)