Datasheet
MAX4514/MAX4515
Low-Voltage, Low-On-Resistance,
SPST, CMOS Analog Switches
6 _______________________________________________________________________________________
__________Applications Information
Power-Supply Considerations
The MAX4514/MAX4515 construction is typical of most
CMOS analog switches, except that they have only two
supply pins: V+ and GND. V+ and GND drive the inter-
nal CMOS switches and set their analog voltage limits.
Reverse ESD-protection diodes are internally connect-
ed between each analog-signal pin and both V+ and
GND. One of these diodes conducts if any analog sig-
nal exceeds V+ or GND.
Virtually all the analog leakage current comes from the
ESD diodes to V+ or GND. Although the ESD diodes on
a given signal pin are identical and therefore fairly well
balanced, they are reverse biased differently. Each is
biased by either V+ or GND and the analog signal. This
means their leakages will vary as the signal varies. The
difference in the two diode leakages to the V+ and GND
pins constitutes the analog-signal-path leakage current.
All analog leakage current flows between each pin and
one of the supply terminals, not to the other switch termi-
nal. This is why both sides of a given switch can show
leakage currents of the same or opposite polarity.
There is no connection between the analog-signal
paths and V+ or GND.
V+ and GND also power the internal logic and logic-
level translators. The logic-level translators convert the
logic levels to switched V+ and GND signals to drive
the analog signal gates.
Logic-Level Thresholds
The logic-level thresholds are CMOS/TTL compatible
when V+ is +5V. As V+ is raised, the level threshold
increases slightly. When V+ reaches +12V, the level
threshold is about 3.0V—above the TTL guaranteed
high-level minimum of 2.8V, but still compatible with
CMOS outputs.
Do not connect the MAX4514/MAX4515’s V+ to +3V
and then connect the logic-level pins to logic-level
signals that operate from +5V supply. Output levels
can exceed +3V and violate the absolute maximum
ratings, damaging the part and/or external circuits.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat up to
250MHz (see Typical Operating Characteristics). Above
20MHz, the on response has several minor peaks that
are highly layout dependent. The problem is not in turn-
ing the switch on; it’s in turning it off. The off-state switch
acts like a capacitor and passes higher frequencies with
less attenuation. At 10MHz, off isolation is about -45dB
in 50Ω systems, decreasing (approximately 20dB per
decade) as frequency increases. Higher circuit imped-
ances also make off isolation decrease. Off isolation is
about 3dB above that of a bare IC socket, and is due
entirely to capacitive coupling.
∆V
OUT
V+
0V
V
IN
V
OUT
MAX4515MAX4514
∆V
OUT
IS THE MEASURED VOLTAGE DUE TO CHARGE TRANSFER
ERROR Q WHEN THE CHANNEL TURNS OFF.
Q = ∆V
OUT
x
C
L
V+
V
OUT
GND
V+
IN
NO
or
NC
COM
V
NO
or V
NC
= 0V
50Ω
MAX4514
MAX4515
C
L
1000pF
V
IN
Figure 1. Charge Injection
______________________________________________Test Circuits/Timing Diagrams