Datasheet

14 _____________________________________________________________________________________
MAX3945
1.0625Gbps to 11.3Gbps,
SFP+ Dual-Path Limiting Amplifier
Table 5. Output Signal Deemphasis Control
Table 6. CML Output Amplitude Range (Typical)
Table 7. CML Output DAC Resolution (Typical)
RXCTRL2[1] RXCTRL1[7:6] OPERATION MODE DESCRIPTION
RXDE_EN RXDE1 RXDE0 MODE
DEEMPHASIS
(dB)
0 X X Deemphasis block is disabled 0
1 0 0 Deemphasis block is enabled Level 1 0.3
1 0 1 Deemphasis block is enabled Level 2 1.1
1 1 0 Deemphasis block is enabled Level 3 2.1
1 1 1 Deemphasis block is enabled Level 4 4.3
RXCTRL1[1] RXCTRL2[1] RXCTRL1[7:6]
MODE
OUTPUT
AMPLITUDE
(mV
P-P
)
RATE_SEL RXDE_EN RXDE1 RXDE0
0 X X X Low data-rate path 400 to 1192
1 0 X X High data-rate path 400 to 1147
1 1 0 0 High data-rate path with deemphasis 400 to 1041
1 1 0 1 High data-rate path with deemphasis 400 to 987
1 1 1 0 High data-rate path with deemphasis 400 to 908
1 1 1 1 High data-rate path with deemphasis 400 to 828
RXCTRL1[1] RXCTRL2[1] RXCTRL1[7:6]
MODE
RESOLUTION
(mV
P-P
)
RATE_SEL RXDE_EN RXDE1 RXDE0
0 X X X Low data-rate path 4.5
1 0 X X High data-rate path 4.5
1 1 0 0 High data-rate path with deemphasis 4.1
1 1 0 1 High data-rate path with deemphasis 3.9
1 1 1 0 High data-rate path with deemphasis 3.6
1 1 1 1 High data-rate path with deemphasis 3.3