Datasheet

MAX2016
LF-to-2.5GHz Dual Logarithmic Detector/
Controller for Power, Gain, and VSWR Measurements
16 ______________________________________________________________________________________
Comparators/Window Detectors
The MAX2016 integrates two comparators for use in
monitoring the difference in power levels (gain) of
RFINA and RFINB. The thresholds of the two compara-
tors are set to the voltage applied to the CSETL and
CSETH pins. The output of each comparator can be
monitored independently or from the COR output that
ORs the outputs of the individual comparators. This can
be used for a window-detector function.
These comparators can be used to trigger hardware
interrupts, allowing rapid detection of over-range condi-
tions. These comparators are high-speed devices.
Connect high-value bypass capacitors (0.1µF) between
each comparator threshold input (CSETL and CSETH)
to ground to provide a solid threshold voltage at high
switching speeds.
Some applications may benefit from the use of hystere-
sis in the comparator response. This can be useful for
prevention of false triggering in the presence of small
noise perturbations in the signal levels, or with signals
with large amplitude modulation. To introduce hysteresis
into the comparator output, connect a feedback resistor
from COUTL to CSTEL. Select the value of this resistor,
in combination with the resistive-divider values used to
set threshold-level CSETL, to set the amount of hystere-
sis. Set the parallel combination of resistors connected
to CSETL to be less than 10kΩ for best performance.
Figure 8 illustrates the use of these comparators in a
gain-monitoring application. The low comparator has its
threshold (CSETL) set at a low-gain trip point. If the
gain drops below this trip point, the COUTL output
goes from a logic 0 to a logic 1. The high comparator
has its threshold (CSETH) set at a high trip point. If the
gain exceeds this trip point, the COUTH output goes
from logic 0 to logic 1. The window comparator output
(COR) rests a logic 0 if the gain is in the acceptable
range, between CSETL and CSETH. It goes to a logic 1
if the gain is either above or below these limits.
Power-Supply Connection
The MAX2016 is designed to operate from a single
+2.7V to +3.6V supply. To operate under a higher sup-
ply voltage range, a resistor must be connected in series
with the power supply and V
CC
to reduce the voltage
delivered to the chip. For a +4.75V to +5.25V supply,
use a 37.4Ω (±1%) resistor in series with the supply.
Layout Considerations
A properly designed PCB is an essential part of any
RF/microwave circuit. Keep RF signal lines as short as
possible to reduce losses, radiation, and inductance.
For the best performance, route the ground pin traces
directly to the exposed pad under the package. The
PCB exposed pad MUST be connected to the ground
plane of the PCB. It is suggested that multiple vias be
used to connect this pad to the lower level ground
MAX2016
RFINA
RFINB
IN
LOGARITHMIC
DETECTOR
LOGARITHMIC
DETECTOR
OUTD
SETD
COUPLER
COUPLER
RF BLOCK
OUT
CSETL
COR
CSETH
20k
Ω
Figure 8. Window Comparators Monitoring Mode. COR goes high if OUTD drops below CSETL or rises above CSETH.