Datasheet

Integrated Charger, Dual Main Step-Down
Controllers, and Dual LDO Regulators
MAX17085B
______________________________________________________________________________________ 29
Charger Design Procedure
Inductor Selection
The selection criteria for the inductor trades off efficien-
cy, transient response, size, and cost. The MAX17085B's
charger combines all the inductor trade-offs in an opti-
mum way using the high-frequency current-mode archi-
tecture. High-frequency operation permits the use of a
smaller and cheaper inductor, and consequently results
in smaller output ripple and better transient response.
The charge current, ripple, and operating frequency
(off-time) determine the inductor characteristics. For
optimum efficiency, choose the inductance according to
the following equation:
2
ADP
CHG
MAX CHG
kV
L
4 LIR I
=
××
where k = 35ns/V.
For optimum size and inductor current ripple, choose
LIR
MAX
= 0.4, which sets the ripple current to 40% of the
charge current and results in a good balance between
inductor size and efficiency. Higher inductor values
decrease the ripple current. Smaller inductor values
save cost but require higher saturation current capabili-
ties and degrade efficiency.
Inductor LCHG must have a saturation current rating of at
least the maximum charge current plus 1/2 of the ripple
current (DIL):
CHG
SAT CHG
IL
II
2
∆
= +
The ripple current is determined by:
2
ADP
CHG
CHG
kV
IL
4L
∆=
⋅
Output Capacitor Selection
The output capacitor absorbs the inductor ripple cur-
rent and must tolerate the surge current delivered from
the battery when it is initially plugged into the charger.
As such, both capacitance and ESR are important
parameters in specifying the output capacitor as a filter.
Beyond the stability requirements, it is often sufficient
to make sure that the output capacitor’s ESR is much
lower than the battery’s ESR. Either tantalum or ceramic
capacitors can be used on the output. Ceramic devices
are preferable because of their good voltage ratings and
resilience to surge currents. Choose the output capacitor
based on:
Table 5. Main SMPS Fault Protection and Shutdown Operation
MODE CONTROLLER STATE DRIVER STATE
Shutdown (ON_ = High
to Low)
Internal error amplifier target immediately resets to GND.
DL and DH immediately pulled low;
20I output discharge active.
Output UVP (Latched
with 4 Autorestarts)
Internal error amplifier target immediately resets to GND.
After ~ 7ms timeout, the controller restarts if ON_ is still high.
DL and DH immediately pulled low;
20I output discharge active.
Output OVP (Latched
with 4 Autorestarts)
Controller shuts down and the internal error amplifier target
resets to GND.
After ~ 7ms timeout, the controller restarts if ON_ is still high.
DL immediately driven high;
DH pulled low;
20I output discharge active.
Thermal Fault (Latched
with 4 Autorestarts)
SMPS controller disabled (assuming ON_ pulled high). Internal
error amplifier target immediately resets to GND.
After the die temperature falls by ~ 50NC, the controller restarts
if ON_ is still high.
DL and DH pulled low;
20I output discharge active.
V
CC
UVLO Falling
Edge
SMPS controller disabled (assuming ON_ pulled high), internal
error amplifier target immediately resets to GND.
DL and DH pulled low;
20I output discharge active.
V
CC
UVLO Rising
Edge
SMPS controller enabled (assuming ON_ pulled high),
controller ramps up the output to the preset voltage.
DL and DH held low and 20I output
discharge active until V
CC
passes
the UVLO threshold.
V
CC
POR SMPS inactive.
DL and DH pulled low;
20I output discharge active.