Datasheet

MAX16000–MAX16007
Low-Voltage, Quad-/Hex-/Octal-Voltage
µP Supervisors
21
Maxim Integrated
RESET
WDO
WDI
t
RP
t<t
WD
t<t
WD
t<t
WD
t
WD
t
RP
V
TH
V
TH
+ V
TH_HYST
V
TH
+ V
TH_HYST
V
IN
Figure 13. WDO Timing Related to V
TH
and t
RP
MARGIN
RESET
INTERNAL
RESET
SIGNAL
t
RP
t
RP
t
WD
V
TH
V
TH
+ V
TH_HYST
V
TH
+ V
TH_HYST
V
IN
Figure 14. Margin Output Disable (MARGIN) Affect on RESET within t
RP