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General Description

The MAX1510/MAX17510 DDR linear regulators source

and sink up to 3A peak (typ) using internal n-channel

MOSFETs. These linear regulators deliver an accurate

0.5V to 1.5V output from a low-voltage power input (V

= 1.1V to 3.6V). The MAX1510/MAX17510 use a sepa-

rate 3.3V bias supply to power the control circuitry and

drive the internal n-channel MOSFETs.

The MAX1510/MAX17510 provide current and thermal

limits to prevent damage to the linear regulator.

Additionally, the MAX1510/MAX17510 generate a

power-good (PGOOD) signal to indicate that the output

is in regulation. During startup, PGOOD remains low

until the output is in regulation for 2ms (typ). The internal

soft-start limits the input surge current.

The MAX1510/MAX17510 power the active-DDR termi-

nation bus that requires a tracking input reference. The

MAX1510/MAX17510 can also be used in low-power

chipsets and graphics processor cores that require

dynamically adjustable output voltages. The

MAX1510/MAX17510 are available in a 10-pin, 3mm x

3mm thin DFN package.

Applications

Notebook/Desktop Computers

DDR Memory Termination

Active Termination Buses

Graphics Processor Core Supplies

Chipset/RAM Supplies as Low as 0.5V

Features

o Internal Power MOSFETs with Current Limit (3A typ)

o Fast Load-Transient Response

o External Reference Input with Reference

Output Buffer

o 1.1V to 3.6V Power Input

o ±15mV (max) Load-Regulation Error

o Thermal-Fault Protection

o Shutdown Input

o Power-Good Window Comparator with 2ms

(typ) Delay

o Small, Low-Profile 10-Pin, 3mm x 3mm TDFN

Package

o Ceramic or Polymer Output Capacitors

MAX1510/MAX17510

Low-Voltage DDR Linear Regulators

________________________________________________________________

Maxim Integrated Products

Ordering Information

OUT

OUTS

AGND

PGND

OUT

= V

(1.1V TO 3.6V)

BIAS

(2.7V TO 3.6V)

DDQ

(2.5V OR 1.8V)

REFOUT

= V

TTR

REFOUT

MAX1510

MAX17510

PGOOD

SHDN

REFIN

Typical Operating Circuit

19-3279; Rev 5; 3/11

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

EVALUATION KIT

AVAILABLE

PART TEMP RANGE

PIN-

PACKAGE

TOP

MARK

MAX1510ETB -40°C to +85°C 10 TDFN-EP* ARD

MAX1510ETB+ -40°C to +85°C 10 TDFN-EP* ABD

MAX1510ATB/V+ -40°C to +85°C 10 TDFN-EP* AWD

MAX17510ATB+ - 40° C to + 125° C 10 TDFN-EP* AWQ

MAX17510ATB/V+ - 40° C to + 125° C 10 TDFN-EP* AWQ

SHDN

OUTSPGOOD

OUT

PGND

AGND

REFIN

TDFN

3mm x 3mm

TOP VIEW

51234

INREFOUT

MAX1510

MAX17510

A "+" SIGN WILL REPLACE THE FIRST PIN INDICATOR ON LEAD-FREE PACKAGES.

610987

Pin Configuration

Denotes a lead(Pb)-free and RoHS-compliant package.

EP = Exposed pad.

/V denotes an automotive qualified part.

Summary of content (13 pages)

PAGE 1
9-3279; Rev 5; 3/11 KIT ATION EVALU E L B AVAILA Low-Voltage DDR Linear Regulators Features The MAX1510/MAX17510 DDR linear regulators source and sink up to 3A peak (typ) using internal n-channel MOSFETs. These linear regulators deliver an accurate 0.5V to 1.5V output from a low-voltage power input (VIN = 1.1V to 3.6V). The MAX1510/MAX17510 use a separate 3.3V bias supply to power the control circuitry and drive the internal n-channel MOSFETs.
PAGE 2
MAX1510/MAX17510 Low-Voltage DDR Linear Regulators ABSOLUTE MAXIMUM RATINGS IN to PGND............................................................-0.3V to +4.3V OUT to PGND ..............................................-0.3V to (VIN + 0.3V) OUTS to AGND ............................................-0.3V to (VIN + 0.3V) VCC to AGND.........................................................-0.3V to +4.3V REFIN, REFOUT, SHDN, PGOOD to AGND ..-0.3V to (VCC + 0.3V) PGND to AGND ....................................
PAGE 3
Low-Voltage DDR Linear Regulators (VIN = 1.8V, VCC = 3.3V, VREFIN = VOUTS = 1.25V, SHDN = VCC, circuit of Figure 1, TJ = TA = -40°C to +85°C for MAX1510ETB, TJ = TA = -40°C to +125°C for MAX17510ATB, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS REFERENCE REFIN Voltage Range VREFIN REFIN Input-Bias Current IREFIN REFIN Undervoltage-Lockout Voltage REFOUT Voltage 0.5 1.5 V -1 +1 µA 0.35 0.45 V VREFIN VREFIN + 0.
PAGE 4
Typical Operating Characteristics (Circuit of Figure 1. TA = +25°C, unless otherwise noted.) 1.275 0.90 VIN = 1.8V 1.250 0.88 1.225 VIN = 1.2V 0.86 0.84 -2 -1 0 1 2 3 0 -3 -2 -1 0 1 2 1.0 3 1.5 2.0 2.5 3.0 BIAS CURRENT (ICC) vs. LOAD CURRENT (IOUT) 0.9 0.8 VOUT = 1.25V 0.7 0.6 VIN = 1.5V 1.2 1.0 ICC (mA) ICC (mA) 1.4 MAX1510/MAX17510 toc05 MAX1510/MAX17510 toc04 1.0 0.5 0.4 100 0.3 INPUT UVLO 0 1.0 1.5 2.0 2.5 3.0 0 3.5 VOUT = 0.90V 0.6 ENTERING DROPOUT 0.2 0.
PAGE 5
Low-Voltage DDR Linear Regulators REFOUT VOLTAGE ERROR vs. REFOUT LOAD CURRENT STARTUP WAVEFORM MAX1510/MAX17510 toc10 15 REFOUT VOLTAGE ERROR (mV) SHUTDOWN WAVEFORM MAX1510/MAX17510 toc11 20 10 MAX1510/MAX17510 toc12 5V SHDN 0V RLOAD = 100Ω 5V SHDN 0V 2V 1.
PAGE 6
Typical Operating Characteristics (continued) (Circuit of Figure 1. TA = +25°C, unless otherwise noted.) 50 SAMPLE SIZE = 200 VDDQ 1.8V 1.2V VREFOUT 0.9V 1.2V SAMPLE PERCENTAGE (%) 2.5V VOUT +25°C +85°C 40 50 MAX1510/MAX17510 toc18 VIN = 1.8V SAMPLE SIZE = 200 SAMPLE PERCENTAGE (%) MAX1510/MAX17510 toc17 SOURCE CURRENT-LIMIT DISTRIBUTION 30 20 10 +25°C +85°C 40 MAX1510/MAX17510 toc19 SINK CURRENT-LIMIT DISTRIBUTION DYNAMIC OUTPUT-VOLTAGE TRANSIENT 30 20 10 0.9V 0 0 -3.0 -2.0 -2.
PAGE 7
Low-Voltage DDR Linear Regulators PIN NAME FUNCTION 1 REFOUT 2 VCC 3 AGND Analog Ground. Connect the backside pad to AGND. 4 REFIN External Reference Input. REFIN sets the output regulation voltage (VOUTS = VREFIN). 5 PGOOD 6 OUTS Output Sense Input. The OUTS regulation level is set by the voltage at REFIN. Connect OUTS to the remote DDR termination bypass capacitors. OUTS is internally connected to OUT through a 12kΩ resistor. 7 SHDN Shutdown Control Input.
PAGE 8
MAX1510/MAX17510 Low-Voltage DDR Linear Regulators 3.3V BIAS SUPPLY VCC IN EN UVLO OFF ON INPUT 1.1V TO 3.6V SOFTSTART SHDN THERMAL SHDN REFIN VDDQ OUT Gm PGND VTTR 12kΩ REFOUT OUTS AGND REFIN +150mV EN 8Ω REFIN -150mV POWERGOOD PGOOD MAX1510 MAX17510 DELAY LOGIC Figure 2.
PAGE 9
Low-Voltage DDR Linear Regulators 3.3V Bias Supply (VCC) The VCC input powers the control circuitry and provides the gate drive to the pass transistor. This improves efficiency by allowing VIN to be powered from a lower supply voltage. Power V CC from a well-regulated 3.3V supply. Current drawn from the VCC supply remains relatively constant with variations in VIN and load current. Bypass VCC with a 1µF or greater ceramic capacitor as close to the device as possible.
PAGE 10
MAX1510/MAX17510 Low-Voltage DDR Linear Regulators SHDN 200μs CURRENT LIMIT OUTPUT OVERLOAD CONDITION POWER-GOOD WINDOW OUT 2ms STARTUP DELAY PGOOD 10μs PROPAGATION DELAY 10μs PROPAGATION DELAY Figure 3. MAX1510/MAX17510 PGOOD and Soft-Start Waveforms Power-Good (PGOOD) The MAX1510/MAX17510 provide an open-drain PGOOD output that goes high 2ms (typ) after the output initially reaches regulation during startup as shown in Figure 3.
PAGE 11
Low-Voltage DDR Linear Regulators PDIS(MAX) = TJ(MAX) - TA θJC + θCA where TJ(MAX) is the maximum junction temperature (+150°C), TA is the ambient temperature, θJC is the thermal resistance from the die junction to the package case, and θCA is the thermal resistance from the case through the PCB, copper traces, and other materials to the surrounding air. For optimum power dissipation, use a large ground plane with good thermal contact to the backside pad, and use wide input and output traces.
PAGE 12
MAX1510/MAX17510 Low-Voltage DDR Linear Regulators Noise, PSRR, and Transient Response PCB Layout Guidelines The MAX1510/MAX17510 operate with low-dropout voltage and low quiescent current in notebook computers while maintaining good noise, transient response, and AC rejection specifications. Improved supply-noise rejection and transient response can be achieved by increasing the values of the input and output capacitors. Use passive filtering techniques when operating from noisy sources.
PAGE 13
Low-Voltage DDR Linear Regulators REVISION NUMBER REVISION DATE 0 5/04 Initial release 1 1/05 Raised Absolute Maximum rating 2 8/05 Added MAX1510ETB 3 4/09 Added automotive-qualified part MAX1510ETB/V+ 4 7/09 Added MAX17510 to data sheet; added temperature grades for MAX1510ATB+ and MAX1510ATB/V+; minor edits 5 3/11 Added MAX17510 automotive qualified part DESCRIPTION PAGES CHANGED — 1, 14 1 1, 2, 7, 12, 13 1, 2, 3, 6, 7, 12, 13 1 Maxim cannot assume responsibility for use of any circu