Datasheet

Figure 17. ADSP2101 Interface Timing Diagram
Figure 18. NEC µP077230 Interlace Circuit
Figure 16. ADSP2101 to MAX121 Interface
CLKIN
1 2 14 15 16 17
LSBMSB
t
SCS
t
SCH
CONVST
SCLK
(INVCLK = V
CC
)
1 2
D12 D1
14 15 16 17
SFRM
(INVFRM = GND)
SDATA
SI
CONVST
µPD77230
MAX121
SCLK SCLK
SIEN
P2
SFRM
CONVST
CLKIN
OSC
CS
INVFRM
INVCLK
DGND
+5V
DMS OR PMS
CONVST
ADSP2101
MAX121
SCLK SCLK
RFS
DR
INVFRM
SFRM
SDATA
CLKIN
OSC 0.1MHz ≤ f ≤ 5.5MHz
CS
INVCLK
DGND
+5V
MAX121 308ksps ADC with DSP Interface and 78dB SINAD
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