Datasheet

Maxim Integrated │ 17
MAX11166/MAX11167 16-Bit, 500ksps/250ksps, ±5V SAR ADCs
with Internal Reference in TDFN
www.maximintegrated.com
Functional Diagram
Detailed Description
The MAX11166/MAX11167 are 16-bit single-channel,
pseudo-differential ADCs with maximum throughput rates
of 500ksps/250ksps. These ADCs include a precision
internal reference that allows for measuring a bipolar
input voltage range of Q5V. An external reference can also
be applied for input ranges between Q3.05V and Q5.19V.
Both inputs (AIN+ and AIN-) are sampled with a pseudo-
differential on-chip track-and-hold.
The MAX11166/MAX11167 measure a true bipolar volt-
age of Q5V (10V
P-P
) and the inputs are protected for up
to Q20mA of overrange current. These ADCs are powered
from a 4.75V to 5.25V analog supply (V
DD
) and a sepa-
rate 2.3V to 5.25V digital supply (OVDD). The MAX11166/
MAX11167 require 500ns/1Fs to acquire the input sample
on an internal track-and-hold and then convert the
sampled signal to 16 bits of accuracy using an internally
clocked converter.
Analog Inputs
The MAX11166/MAX11167 ADCs consist of a true sam-
pling pseudo-differential input stage with high-impedance,
capacitive inputs. The internal T/H circuitry feature a small-
signal bandwidth of about 6MHz to provide 16-bit accu-
rate sampling in 500ns (MAX11166)/1Fs (MAX11167).
This allows for accurate sampling of a number of scanned
channels through an external multiplexer.
The MAX11166/MAX11167 can thus convert input sig-
nals on AIN+ in the range of -(K O V
REF
+ AIN-) to +(K
O V
REF
+ AIN-) where K = 5.000/4.096. AIN+ should also
be limited to ±(V
DD
+ 0.1V) for accurate conversions.
AIN- has an input range of -0.1V to +0.1V and should
be connected to the ground reference of the input signal
source. The MAX11166/MAX11167 performs a true dif-
ferential sampling on inputs between AIN+ and AIN- with
good common-mode rejection (see the Typical Operating
Circuit). This allows for improved sampling of remote
transducer inputs.
Many traditional ADCs with single supplies that mea-
sure bipolar input signals use resistive divider networks
directly on the analog inputs. These networks increase
the complexity of the input signal conditioning. However,
the MAX11166/MAX11167 include a patented input switch
architecture that allows direct sampling of high-imped-
ance sources. This architecture requires a minimum
sample rate of 10Hz to maintain accurate conversions
over the designed temperature and supply ranges.
16-BIT ADC
CONFIGURATION REGISTER
REF
BUF
INTERNAL
REFERENCE
AIN+
AIN-
A
GNDS
SW1
10k
Ω
REFIO
CNVST
DOUT
REF
GND
OVDD
V
DD
SCLK
DIN
INTERFACE
AND CONTROL
MAX11166
MAX11167
SW2
CONFIGURATION
REGISTER
REFERENCE
MODE
REFERENCE SWITCH
STATE
B5
0
0
1
1
B4
0
1
0
1
SW2
CLOSED
CLOSED
OPEN
OPEN
SW1
CLOSED
OPEN
CLOSED
OPEN
0
1
2
3