Datasheet

36
MAX11135–MAX11143
500ksps, Low-Power, Serial 12-/10-/8-Bit,
4-/8-/16-Channel ADCs
Figure 12. ADC Mode Select Programming Sequence
REPEAT
INTERNAL/EXTERNAL
CLOCK
STANDARD-INT
UPPER-INT
CUSTOM-INT
MANUAL
ADC CONFIGURATION REGISTER
SET AVG ON BIT TO 1
SET NAVG[1:0] TO N
ADC CONFIGURATION REGISTER
SET AVG ON BIT TO 1
SET NAVG[1:0] TO N
AVERAGE
AVERAGE
AVERAGE
ADC CONFIGURATION REGISTER
SET AVG ON BIT TO 1
SET NAVG[1:0] TO N
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0101
SET CHSEL[3:0] TO CHANNEL NUMBER
SELECT THE RIGHT SWCNV BIT
ADC MODE CONTROL REGISTER
SET SCA[3:0] TO 0011
SET CHSEL[3:0] TO CHANNEL NUMBER
SELECT THE RIGHT SWCNV BIT
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0010
SET CHSEL[3:0] TO CHANNEL NUMBER
SELECT THE RIGHT SWCNV BIT
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0001
SET CHSEL[3:0] TO CHANNEL NUMBER
SELECT THE PM[1:0] BITS
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0100
SET CHSEL[3:0] TO CHANNEL NUMBER
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0110
SET CHSEL[3:0] TO CHANNEL NUMBER
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 1001
SET CHSEL[3:0] TO CHANNEL NUMBER
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 1000
SET CHSEL[3:0] TO CHANNEL NUMBER
SampleSet REGISTER
SET SEQ_DEPTH[7:0] TO SET
CHANNEL CAPTURE DEPTH
FOLLOW SampleSet REGISTER WITH
CHANNEL PATTERN OF THE SAME SIZE
AS SEQUENCE DEPTH
AVERAGE
ADC CONFIGURATION REGISTER
SET AVGON BIT TO 1
SET NAVG[1:0] TO N
SET CUSTOM Scan0 REGISTER
SET CUSTOM Scan1 REGISTER
SET CUSTOM Scan0 REGISTER
SET CUSTOM Scan1 REGISTER
ADC CONFIGURATION REGISTER
SET NSCAN[1:0] FOR SCAN COUNT
ADC MODE CONTROL REGISTER
SET SCAN[3:0] TO 0111
SET CHSEL[3:0] TO CHANNEL NUMBER
SELECT THE RIGHT SWCNV BIT
INTERNAL EXTERNAL
YES
YES
YES
NO
NO
YES
NO
YES
NO
YES
NO
YES
NO
YES
YES
NO
NO
YES
YES
NO
NO
YES
YES
NO
NO
STANDARD-EXT
UPPER-EXT
CUSTOM-EXT
SampleSet