Datasheet

DS4550
I
2
C and JTAG Nonvolatile 9-Bit I/O
Expander Plus Memory
4 _____________________________________________________________________
NONVOLATILE MEMORY CHARACTERISTICS
(V
CC
= +2.7V to +5.5V, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
EEPROM Writes +70°C (Note 3)
50,000
Note 1: All voltages referenced to ground.
Note 2: I
STBY
is specified with SDA = SCL = TMS = TDI = V
CC
, outputs floating, and inputs connected to V
CC
or GND.
Note 3: Guaranteed by design.
Note 4: Timing shown is for fast-mode (400kHz) operation. This device is also backward-compatible with I
2
C standard mode timing.
Note 5: After this period, the first clock pulse is generated.
Note 6: C
B
total capacitance of one bus line in picofarads.
Note 7: EEPROM write time applies to all the EEPROM memory and SRAM-shadowed EEPROM memory when SEE = 0. The
EEPROM write time begins after a stop condition occurs.
Note 8: TCK can be stopped either high or low.
Note 9: EEPROM write begins immediately after the UPDATE-DR state that latches the data to be written. The EEPROM cannot be
accessed until the EEPROM write has completed. However, the remainder of the JTAG functionality is active and accessi-
ble during the EEPROM write.
TCK
t
1
t
2
t
3
t
4
t
5
t
6
t
7
TDI, TMS
TDO
Figure 1. JTAG Timing Diagram