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DS3232M

±5ppm, I

C Real-Time Clock with SRAM

General Description

The DS3232M is a low-cost, extremely accurate, I

real-time clock (RTC) with 236 bytes of battery-backed

SRAM. The device incorporates a battery input and

maintains accurate timekeeping when main power to the

device is interrupted. The integration of the microelec-

tromechanical systems (MEMS) resonator enhances the

long-term accuracy of the device and reduces the piece-

part count in a manufacturing line.

The RTC maintains seconds, minutes, hours, day, date,

month, and year information. The date at the end of the

month is automatically adjusted for months with fewer

than 31 days, including corrections for leap year. The

clock operates in either the 24-hour or 12-hour format

with an AM/PM indicator. Two programmable time-of-day

alarms and a 1Hz output are provided. Address and data

are transferred serially through an I

C bidirectional bus.

A precision temperature-compensated voltage reference

and comparator circuit monitors the status of V

detect power failures, to provide a reset output, and to

automatically switch to the backup supply when neces-

sary. Additionally, the RST pin is monitored as a pushbut-

ton input for generating a microprocessor reset. See the

Block Diagram for more details.

Applications

Power Meters

Industrial Applications

Features

S Timekeeping Accuracy ±5ppm (±0.432 Second/

Day) from -40NC to +85NC

S 236 Bytes of Battery-Backed User SRAM

S Battery Backup for Continuous Timekeeping

S Low Power Consumption

S Functionally Compatible to DS3232

S Complete Clock Calendar Functionality Including

Seconds, Minutes, Hours, Day, Date, Month, and

Year with Leap Year Compensation Up to Year

2100

S Two Time-of-Day Alarms

S 1Hz and 32.768kHz Outputs

S Reset Output and Pushbutton Input with

Debounce

S Fast (400kHz) I

C-Compatible Serial Bus

S +2.3V to +4.5V Supply Voltage

S Digital Temp Sensor with ±3NC Accuracy

S -40NC to +85NC Temperature Range

S 8-Pin SO (150 mils) Package

S Underwriters Laboratories (UL) Recognized

Typical Operating Circuit

19-6247; Rev 2; 7/13

Ordering Information appears at end of data sheet.

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may

be simultaneously available through various sales channels. For information about device errata, go to: www.maximintegrated.com/errata.

For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/DS3232M.related

DS3232M

SCL

SDA

32KHZ

BAT

CPU

I/O PORT

INTERRUPTS

INT/SQW

RST

PUSH-

BUTTON

RESET

For pricing, delivery, and ordering information, please contact Maxim Direct at

1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

Summary of content (23 pages)

PAGE 1
DS3232M ±5ppm, I2C Real-Time Clock with SRAM General Description The DS3232M is a low-cost, extremely accurate, I2C real-time clock (RTC) with 236 bytes of battery-backed SRAM. The device incorporates a battery input and maintains accurate timekeeping when main power to the device is interrupted. The integration of the microelectromechanical systems (MEMS) resonator enhances the long-term accuracy of the device and reduces the piecepart count in a manufacturing line.
PAGE 2
DS3232M ±5ppm, I2C Real-Time Clock with SRAM ABSOLUTE MAXIMUM RATINGS Junction Temperature......................................................+150NC Lead Temperature (soldering, 10s).................................+300NC Soldering Temperature (reflow).......................................+260NC Voltage Range on Any Pin Relative to GND.........-0.3V to +6.0V Operating Temperature Range........................... -40NC to +85NC Storage Temperature Range.............................
PAGE 3
DS3232M ±5ppm, I2C Real-Time Clock with SRAM DC ELECTRICAL CHARACTERISTICS—GENERAL (continued) (VCC = +2.3V to +4.5V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +3.3V, VBAT = +3.0V, and TA = +25NC, unless otherwise noted.) (Note 2) PARAMETER SYMBOL Temperature Conversion Current (I2C Inactive) ICCSCONV CONDITIONS MIN 2.45 TYP MAX UNITS 200 350 µA 2.575 2.70 V Power-Fail Voltage VPF Logic 0 Output (32KHZ, INT/SQW, SDA) VOL IOL = 3mA 0.
PAGE 4
DS3232M ±5ppm, I2C Real-Time Clock with SRAM AC ELECTRICAL CHARACTERISTICS—POWER SWITCH (TA = -40NC to +85NC, unless otherwise noted.) (Note 2, Figure 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VCC Fall Time, VPFMAX to VPFMIN tVCCF 300 Fs VCC Rise Time, VPFMIN to VPFMAX tVCCR 0 Fs Recovery at Power-Up tREC (Note 6) 250 300 ms AC ELECTRICAL CHARACTERISTICS—I2C INTERFACE (VCC or VBAT = +2.3V to +4.5V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at VCC = +3.
PAGE 5
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Timing Diagrams SDA tBUF tF tLOW tHD:STA tSP SCL tHD:STA tHIGH tR tHD:DAT STOP START tSU:STA tSU:STO tSU:DAT REPEATED START NOTE: TIMING IS REFERENCED TO VILMAX AND VIHMIN. Figure 1. I2C Timing tVCCF tVCCR VPFMAX VPFMIN VCC tREC RST Figure 2. Power Switch Timing RST PBDB tRST Figure 3.
PAGE 6
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) TA = +85°C 120 100 80 TA = +25°C 2.8 DS3232M toc02 1.5 TA = +25°C 0.5 3.8 2.8 3.3 3.8 4.3 0 1 2 3 4 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) OUTPUT CURRENT (mA) INT/SQW OUTPUT VOLTAGE vs. OUTPUT CURRENT POWER-SUPPLY CURRENT vs. SCL FREQUENCY THERMOMETER ERROR vs. TEMPERATURE 170 DS3232M toc04 0.5 VCC = 2.7V 0.3 0.2 0.
PAGE 7
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) 4 2 0 -2 -4 4 2 0 -2 -4 3 2 1 0 -1 -2 -6 -6 -3 -8 -8 -4 -10 -5 -10 5 10 15 20 25 5 10 15 20 25 5 10 15 20 25 TIME (MINUTES) 1Hz FREQUENCY ERROR (10s THERMAL UPDATES MEASURED EVERY SECOND) 1Hz FREQUENCY ERROR (1s THERMAL UPDATES MEASURED EVERY SECOND) TIMEKEEPING ACCURACY vs.
PAGE 8
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Pin Configuration TOP VIEW 32KHZ 1 VCC 2 INT/SQW RST + 8 SCL 7 SDA 3 6 VBAT 4 5 GND DS3232M SO Pin Description PIN NAME FUNCTION 32.768KHZ Output (Push-Pull Output, 50% Duty Cycle). If enabled (EN32KHZ = 1), the 32kHz output is active on VCC. If enabled for battery operation (BB32KHZ = 1), the output is also active on VBAT. When disabled, the output is forced low. This pin can be left unconnected if not used.
PAGE 9
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Block Diagram *SELECTED POWER P DS3232M DIVIDER 32KHZ N INT/SQW 1Hz TIME-BASE RESONATOR VBAT VCC POWER CONTROL* INTERRUPT OR 1Hz SELECT N DIGITAL ADJUSTMENT RST TEMP SENSOR N FACTORY TRIM GND SDA SCL I2C INTERFACE CONTROL AND STATUS REGISTERS SRAM Detailed Description The DS3232M is a serial real-time clock (RTC) driven by an internal, temperature-compensated, microelectromechanical systems (MEMS) resonator.
PAGE 10
DS3232M ±5ppm, I2C Real-Time Clock with SRAM High-Accuracy Time Base +3.3V VCC VBAT Figure 4. Single Supply (VCC Only) VCC Power-Supply Configurations VBAT Figure 5. Single Supply (VBAT Only) +3.3V VCC VBAT Figure 6. Dual Power Supply The temperature sensor, oscillator, and digital adjustment controller logic form the highly accurate time base. The controller reads the output of the on-board temperature sensor and adjusts the final 1Hz output to maintain the required accuracy.
PAGE 11
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Table 1. Power Control CONFIGURATION CONDITION VCC Only (Figure 4) VCC > VPF VCC < VPF VBAT Only (Figure 5) Dual Supply (Figure 6) EOSC = 0 EOSC = 1 VCC > VPF VCC < VPF I/O ACTIVE ICCA Disabled (Low) IBATDR ICCA VCC > VBAT VCC < VBAT Active (Low) IBATT IBATA ICCS ICCA IBATA VBAT Operation There are several modes of operation that affect the amount of VBAT current that is drawn.
PAGE 12
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Real-Time Clock (RTC) With the 1Hz source from the temperature-compensated oscillator, the RTC provides seconds, minutes, hours, day, date, month, and year information. The date at the end of the month is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or the 12-hour format with an AM/PM indicator. The clock provides two programmable time-of-day alarms.
PAGE 13
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Table 2.
PAGE 14
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Alarms The device contains two time-of-day/date alarms. Alarm 1 can be set by writing to registers 07h–0Ah. Alarm 2 can be set by writing to registers 0Bh–0Dh. See Table 2. The alarms can be programmed (by the alarm enable and INTCN bits in the Control register) to activate the INT/SQW output on an alarm match condition. Bit 7 of each of the time-of-day/date alarm registers are mask bits (Table 2).
PAGE 15
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Control Register (0Eh) BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 EOSC 0 BBSQW CONV NA NA INTCN A2IE A1IE 0 0 1 1 1 0 0 BIT 7 EOSC: Enable oscillator. When set to logic 0, the oscillator is started. When set to logic 1, the oscillator is stopped when the device switches to VBAT. This bit is clear (logic 0) when power is first applied.
PAGE 16
DS3232M ±5ppm, I2C Real-Time Clock with SRAM VCC POWERED INTERNAL 1Hz CLOCK BSY CONV THE USER SETS THE CONV BIT THE DEVICE CLEARS THE CONV BIT AFTER THE TEMPERATURE CONVERSION HAS COMPLETED BSY IS HIGH DURING THE TEMPERATURE CONVERSION VBAT POWERED 10 SECONDS INTERNAL 1Hz CLOCK BSY CONV THE USER SETS THE CONV BIT THE DEVICE CLEARS THE CONV BIT AFTER THE TEMPERATURE CONVERSION HAS COMPLETED Figure 7.
PAGE 17
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Status Register (0Fh) BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 OSF BB32KHZ 0 0 EN32KHZ BSY A2F A1F 1 1 0 0 1 X X X BIT 7 OSF: Oscillator stop flag. A logic 1 in this bit indicates that the oscillator either is stopped or was stopped for some period and could be used to judge the validity of the timekeeping data. This bit is set to logic 1 any time that the oscillator stops. This bit remains at logic 1 until written to logic 0.
PAGE 18
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Aging Offset Register (10h) BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 SIGN DATA DATA DATA DATA DATA DATA DATA 0 0 0 0 0 0 0 0 The Aging Offset register takes a user-provided value to add to or subtract from the factory-trimmed value that adjusts the accuracy of the time base. Use of the Aging Offset register is not needed to achieve the accuracy as defined in the Electrical Characteristics tables.
PAGE 19
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Test Register (13h) BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 NAME: SWRST 0 0 0 0 0 0 0 POR*: 0 0 0 0 0 0 0 0 *POR is defined as the first application of power to the device, either VBAT or VCC. This register is used for factory test. Bits 6:0 are locked and always read as zeros. Writing to bit locations 6:0 has no affect on the device.
PAGE 20
DS3232M ±5ppm, I2C Real-Time Clock with SRAM I2C Serial Port Operation I2C Slave Address The device’s slave address byte is D0h. The first byte sent to the device includes the device identifier, device address, and the R/W bit (Figure 9). The device address sent by the I2C master must match the address assigned to the device. I2C Definitions The following terminology is commonly used to describe I2C data transfers. Master Device: The master device controls the slave devices on the bus.
PAGE 21
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Slave Address Byte: Each slave on the I2C bus responds to a slave address byte sent immediately following a START condition. The slave address byte contains the slave address in the most significant 7 bits and the R/W bit in the least significant bit. The device’s slave address is D0h and cannot be modified by the user. When the R/W bit is 0 (such as in D0h), the master is indicating it writes data to the slave.
PAGE 22
DS3232M ±5ppm, I2C Real-Time Clock with SRAM slave address byte with R/W = 1, reads the data byte with a NACK to indicate the end of the transfer, and generates a STOP condition. However, since requiring the master to keep track of the memory address counter is impractical, use the method for manipulating the address counter for reads. Manipulating the Address Counter for Reads: A dummy write cycle can be used to force the address counter to a particular value.
PAGE 23
DS3232M ±5ppm, I2C Real-Time Clock with SRAM Revision History REVISION NUMBER REVISION DATE DESCRIPTION PAGES CHANGED 0 3/12 Initial release — 1 8/12 Added an automotive qualified part option to the Ordering Information table 22 2 7/13 Added the junction temperature to the Absolute Maximum Ratings section; added the Package Thermal Characteristics section and renumbered the electrical characteristics notes 2, 3, 4 Maxim Integrated cannot assume responsibility for use of any circuitry other t