Datasheet

DS26518 8-Port T1/E1/J1 Transceiver
232 of 312
Register Name:
TIM1
Register Description:
Transmit Interrupt Mask Register 1
Register Address:
1A0h + (200h x (n - 1)) : where n = 1 to 8
Bit # 7 6 5 4 3 2 1 0
Name TESF TESEM TSLIP TSLC96 —
TMF LOTCC LOTC
TESF TESEM TSLIP
—
TAF TMF LOTCC LOTC
Default 0 0 0 0 0 0 0 0
Bit 7: Transmit Elastic Store Full Event (TESF)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 6: Transmit Elastic Store Empty Event (TESEM)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 5: Transmit Elastic Store Slip Occurrence Event (TSLIP)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 4: Transmit SLC96 Multiframe Event (TSLC96) (T1 Mode Only)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 3: Transmit Align Frame Event (TAF) (E1 Mode Only)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 2: Transmit Multiframe Event (TMF)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 1: Loss of Transmit Clock Clear Condition (LOTCC)
0 = Interrupt masked.
1 = Interrupt enabled.
Bit 0: Loss of Transmit Clock Condition (LOTC)
0 = Interrupt masked.
1 = Interrupt enabled.