Datasheet

DS26518 8-Port T1/E1/J1 Transceiver
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Register Name:
TIIR
Register Description:
Transmit Interrupt Information Register
Register Address:
19Fh + (200h x (n - 1)) : where n = 1 to 8
Bit # 7 6 5 4 3 2 1 0
Name — — — — — TLS3 TLS2 TLS1
Default 0 0 0 0 0 0 0 0
The interrupt information register provides an indication of which status registers are generating an interrupt. When
an interrupt occurs, the host can read TIIR to quickly identify which of the transmit status registers are causing the
interrupt(s). These are real-time registers in that the bits will clear once the appropriate interrupt has been serviced
and cleared.
Bit 2: Transmit Latched Status Register 3 Interrupt Status (TLS3)
0 = No interrupt pending.
1 = Interrupt pending.
Bit 1: Transmit Latched Status Register 2 Interrupt Status (TLS2)
0 = No interrupt pending.
1 = Interrupt pending.
Bit 0: Transmit Latched Status Register 1 Interrupt Status (TLS1)
0 = No interrupt pending.
1 = Interrupt pending.