Datasheet

DS26518 8-Port T1/E1/J1 Transceiver
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Register Name:
GHISR
Register Description:
Global HDLC-256 Interrupt Status Register
Register Address:
00F5h
Bit # 7 6 5 4 3 2 1 0
Name HIS8 HIS7 HIS6 HIS5 HIS4 HIS3 HIS2 HIS1
Default 0 0 0 0 0 0 0 0
The GHISR register reports the HDLC-256 interrupt status for Channels 1 through 8. A logic one in the associated
bit location indicates an HDLC-256 has set its interrupt signal.
Bit 7: HDLC-256 Interrupt Status 8 (HIS8)
0 = HDLC-256 8 has not issued an interrupt.
1 = HDLC-256 8 has issued an interrupt.
Bit 6: HDLC-256 Interrupt Status 7 (HIS7)
0 = HDLC-256 7 has not issued an interrupt.
1 = HDLC-256 7 has issued an interrupt.
Bit 5: HDLC-256 Interrupt Status 6 (HIS6)
0 = HDLC-256 6 has not issued an interrupt.
1 = HDLC-256 6 has issued an interrupt.
Bit 4: HDLC-256 Interrupt Status 5 (HIS5)
0 = HDLC-256 5 has not issued an interrupt.
1 = HDLC-256 5 has issued an interrupt.
Bit 3: HDLC-256 Interrupt Status 4 (HIS4)
0 = HDLC-256 4 has not issued an interrupt.
1 = HDLC-256 4 has issued an interrupt.
Bit 2: HDLC-256 Interrupt Status 3 (HIS3)
0 = HDLC-256 3 has not issued an interrupt.
1 = HDLC-256 3 has issued an interrupt.
Bit 1: HDLC-256 Interrupt Status 2 (HIS2)
0 = HDLC-256 2 has not issued an interrupt.
1 = HDLC-256 2 has issued an interrupt.
Bit 0: HDLC-256 Interrupt Status 1 (HIS1)
0 = HDLC-256 1 has not issued an interrupt.
1 = HDLC-256 1 has issued an interrupt.