Datasheet

Detailed Description
The DS24B33 combines 4Kb of data EEPROM with a
fully featured 1-Wire interface in a single chip. The
memory is organized as 16 pages of 256 bits each. A
volatile 256-bit memory page called the scratchpad
acts as a buffer when writing data to the EEPROM to
ensure data integrity. Data is first written to the scratch-
pad, from which it can be read back for verification
before transferring it to the EEPROM. The operation of
the DS24B33 is controlled over the single-conductor
1-Wire bus. Device communication follows the standard
1-Wire protocol. The energy required to read and write
the DS24B33 is derived entirely from the 1-Wire com-
munication line. Each DS24B33 has its own unalterable
and unique 64-bit registration number. The registration
number guarantees unique identification and is used to
address the device in a multidrop 1-Wire net environ-
ment. Multiple DS24B33 devices can reside on a com-
mon 1-Wire bus and be operated independently of
each other. Applications of the DS24B33 include cali-
bration data storage, PCB identification, and storage of
product revision status. The DS24B33 provides a high
degree of backward compatibility with the DS2433,
including having the same family code.
Overview
Figure 1 shows the relationships between the major
control and memory sections of the DS24B33. The
DS24B33 has four main data components: 64-bit
Pin Description
PIN
SFN TDFN-EP TO-92 SO NAME FUNCTION
2 3 1 4 GND Ground Reference
1 2 2 3 IO
1-Wire Bus Interface. Open-drain pin that requires external pullup
1, 4, 5, 6 3 1, 2, 5–8 N.C. Not Connected
— — — EP
Exposed Pad (TDFN only). Solder evenly to the board’s ground plane for
proper operation. Refer to Application Note 3273: Exposed Pads: A Brief
Introduction for additional information.
1-Wire 4Kb EEPROM
DS24B33
1-Wire FUNCTION
CONTROL
1-Wire NET
PARASITE POWER
CRC-16
GENERATOR
64-BIT REGISTRATION
NUMBER
32-BYTE
SCRATCHPAD
DATA MEMORY
16 PAGES OF
32 BYTES EACH
MEMORY
FUNCTION
CONTROL UNIT
Figure 1. Block Diagram
5
DS24B33