Datasheet

DS1644/DS1644P
6 of 14
DATA RETENTION MODE
When V
CC
is within nominal limits (V
CC
> 4.5 volts) the DS1644 can be accessed as described above with
read or write cycles. However, when V
CC
is below the power-fail point V
PF
(point at which write
protection occurs) the internal clock registers and RAM are blocked from access. This is accomplished
internally by inhibiting access via the CE signal. At this time the power-fail output signal (PFO ) will be
driven active low and will remain active until V
CC
returns to nominal levels. When V
CC
falls below the
level of the internal battery supply, power input is switched from the V
CC
pin to the internal battery and
clock activity, RAM, and clock data are maintained from the battery until V
CC
is returned to nominal
level.