Getting Started Guide for LX9 and Nexys3 User Manual

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Analog Essentials

Getting Started Guide

For LX9 and Nexys-3

Overview

Maxim Analog Essentials are a series of plug-in peripheral modules that allow engineers to quickly test, evaluate, and

integrate Maxim components into their hardware/software designs. The modules electrically and physically conform to

the Digilent Pmod™ interface specification and are compatible with any Digilent Pmod-compatible header.

The Analog Essentials collection contains 15 peripheral module boards which are supported by prebuilt hardware and

software projects for various FPGA development boards which are compatible. This version of the Getting Started Guide

is applicable to LX9 and Nexys™-3 boards, both of which are based on Spartan®-6 FPGAs. Users of the other FPGA boards

should refer to different versions of this guide.

Important notes – please read carefully

1. ESD Sensitivity. These modules are intended to be used in an electronic prototyping setting.

They are sensitive to static charge and are subject to damage if proper precautions against

ESD are not taken. When handling these modules, the user should take the same care and

precautions as when working with other ESD sensitive prototypes.

2. Plug – Connector mating. Many plug-in modules contain only one row of six pins, while most Pmod connectors

contain two rows of six contacts each. When plugging in a module with a single row of pins, always plug the

module into the top row of contacts.

3. Plug in with care. Please exercise care when plugging the modules into the Pmod port. The connectors are not

keyed, so it is possible to incorrectly plug in the module and misalign the pins. Although each module includes

series resistors to provide current limiting, in some cases it is still possible to damage the module if it is

incorrectly plugged in.

4. Nexys-3 and LX9 Differences. Most of the instructions in this document refer to both the Nexys-3 board and the

LX9. Instances where a procedure is specific to one board or other will be denoted by the following indicators:

Additional components required

Interested users may wish to obtain additional components to evaluate the following modules:

MAX3231MPMB1 – this module requires a 10mm, 3V lithium primary type coin cell. The generic battery type is CR1025.

Specific examples of this battery are Panasonic #CR1025 and Energizer #CR1025.

MAX31855PMB1 – this module requires a K-Type thermocouple with subminiature connector. Omega series 5SRTC are

suitable (

www.omega.com). Lower cost alternatives may be available via eBay.

Summary of content (23 pages)

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For LX9 and Nexys-3 Analog Essentials Getting Started Guide Overview Maxim Analog Essentials are a series of plug-in peripheral modules that allow engineers to quickly test, evaluate, and integrate Maxim components into their hardware/software designs. The modules electrically and physically conform to the Digilent Pmod™ interface specification and are compatible with any Digilent Pmod-compatible header.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide Analog Essentials Collection modules The table below lists the peripheral modules included in the collection, along with a description and interface type.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide Typical System Architecture Below is a generalized block diagram for the architecture implemented in the FPGA project. One of the key elements is the logic block that drives each Pmod port. Each Pmod port driver contains a dedicated I2C port, SPI port, UART, and octal GPIO port. Any of these can be quickly connected to the Pmod port via software control. (The multiplexer setting is controlled by another internal GPIO port.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide Getting Started Introduction With small Microblaze FPGA designs, it is typical for the binary executable program to fit entirely within the internal block RAM of the FPGA. In these cases, the FPGA can be programmed by simply downloading a single bit-stream file, which contains both the FPGA logic and the binary executable for the running software on the processor.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide Detailed Steps: Downloading the Example/Demonstration Application 1. Opening the SDK a. From the Windows Start Menu, Open the Xilinx SDK as shown below . b. SDK will prompt for a workspace directory, the location where the software project is located. This directory is generally a subfolder within a Xilinx ISE/EDK project and will include board support files, as well as (.c) and (.h) files. Be certain to choose the correct Workspace directory.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide d. Review the SDK IDE. The Project Explorer in the upper left tab should have three components as shown in the image below. If all three subfolders are present, you can skip the next step. e. If the Project Explorer does not contain these three subfolders, launch the File > Import menu, expand the General tab and select Existing Projects into Workspace. Click Next.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide 2. Downloading the bitstream (.bit) file to the board. a. Click on the Program FPGA icon (which looks like a green chain of devices): b. The Program FPGA dialog box will appear. From here, an FPGA bitstream is selected as well as an FPGA bmm file and a (.elf) file to load into the Microblaze memory as shown below. Be sure to select the toplevel.bit file, the edkBmmFile_bd.bmm, and the bootloop file as shown, then select Program.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide It takes approximately 10 seconds to download the FPGA and a message box indicating “FPGA configuration complete” will appear. A brief note summarizing the previous steps: As discussed earlier in this document, the code size of this program exceeds that available in block memory internal to the FPGA, necessitating the use of the external RAM. This requires a multi-stage loading process implemented with a boot-loader.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide 3. Setting Up the PC for Communication Before loading the executable software file, the serial communications program should be opened so that the PC is ready to communicate with the FPGA board once the software begins executing. The example/demo software running on the host board communicates with the PC via a USB port set up to emulate a serial port (UART).
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide 4. Using Xilinx SDK/XMD to download and run executable file (.elf) on the Microblaze. a. Click the XMD Console tab if it isn’t already showing, as shown below. b. At the XMD% prompt at the bottom of the XMD console, issue the following commands. 1. Use “pwd” and “cd” to navigate to the following directory: C:\designs\maxim\v1_4\sdkWorkspace\maximPMOD\Debug 2. connect mb mdm 3. dow maximPMOD.elf 4. run c.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide 5. Running the demonstration programs Peripheral modules can now be placed into the appropriate PMOD port (Ports A..D) and a menu selection made to exercise the module’s functionality. For example, place the MAX31723 module into the PMOD B port*. When prompted for a Pmod port, select “B”. The submenu for the MAX31723 peripheral module will appear and the module may be exercised using the appropriate keyboard-selected commands.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide The remaining sections of this document are intended to serve only as brief outlines of and introductions to the steps necessary to modify the hardware and software for this project. Detailed instructions on these procedures and the design tools are beyond the scope of this document. Modifying the Project C Code This section provides detailed information on changing the project source code, recompiling, and redownloading. 1.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide c. Make an edit to the maximPMOD.c file. We will uncomment a line of code to add a printf statement to the boot-up screen. This printf statement is located about half-way through the file maximPMOD.c. d. After un-commenting the “Hello World” line, select File > Save from the menu. This will force the IDE to recompile with the code change. The contents of the console should be as shown below. e. The last two lines are critical.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide 2. Optional: Setting the memory locations and generating a linker script In small software designs, the source code can be merged directly into the FPGA bitstream and downloaded with normal FPGA bitstream tools. However, larger software designs (like this one) that exceed the internal code space must be downloaded to and run from external memory. Using the linker script allows the user to select the target memory location. a.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide b. [ LX9 version. Skip to step “c” for Nexys-3.] This will bring up the linker script menu as shown below. From this window the code, data, heap/stack section placement can be chosen. For the application demonstration, this should be set to MCB3_LPDDR_S0_AXI_BASEADDR. Skip to step “d”.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide c. [ Nexys-3. See above for LX9] This will bring up the linker script menu as shown below. From this window the code, data, heap/stack section placement can be chosen. For the application demonstration, this should be set to Digilent_Shared_Mem_Bus_Max_PSRAM_BASEADDR. d. Clicking Generate will rebuild the (.elf) file with the memory locations set to the external PSRAM memory.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide Detailed Steps: Opening the ISE Project to View the HDL and Launch EDK 1. Open Xilinx Project Navigator 13.4 a. Verify that the tools are using the correct directory by looking at the directory displayed at the top of the ISE screen. Xilinx Tools default to opening the last used directory. Be careful to make sure that you are not working on an older revision of the design.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide c. Once any changes are made, the project can be rebuilt by selecting Generate Programming File from the Design tab (see below). This will generate a new toplevel.bit file.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide 2. Open the EDK/XMP project (Microblaze Core/Peripherals) a. Highlight and double-click on “cpu1 – system(system.xmp)” as shown below. Changes to the Microblaze core and the internal peripherals can be configured here. Examples of this are adding additional I2C ports or changing the baud rate on the UARTs. b.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide d. This will launch a dialog box asking to export the design or export and launch SDK. At the dialog box, click the Export & Launch SDK button, or if the SDK is already running, choose Export Only. This process will bring the SDK project .mss/.xml files in sync with the EDK project.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide Appendix A: Project Notes 1. Each active Pmod port has a dedicated I2C port, SPI port UART and octal GPIO. These communications peripherals are multiplexed to the physical ports via an HDL designed multiplexer. (Refer to the diagram in the Typical System Architecture section.) An example of this can be seen in the maximPMOD.c file at about the midpoint, as shown in the clip below.
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide Appendix B: Project Structure and Key Filenames 22
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For LX9 and Nexys-3 Analog Essentials Getting Started Guide All trademarks are property of their respective owners.