Datasheet

LTC3812-5
26
38125fc
FAULT CONDITIONS: CURRENT LIMIT AND FOLDBACK
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage. In
the LTC3812-5, the maximum sense voltage is controlled
by the voltage on the V
RNG
pin. With valley current control,
the maximum sense voltage and the sense resistance
determine the maximum allowed inductor valley current.
The corresponding output current limit is:
I
LIMIT
=
V
SNS(MAX)
R
DS(ON)

T
+
1
2
I
L
The current limit value should be checked to ensure that
I
LIMIT(MIN)
> I
OUT(MAX)
. The minimum value of current limit
generally occurs with the largest V
IN
at the highest ambi-
ent temperature, conditions that cause the largest power
loss in the converter. Note that it is important to check for
self-consistency between the assumed MOSFET junction
temperature and the resulting value of I
LIMIT
which heats
the MOSFET switches.
Caution should be used when setting the current limit
based upon the R
DS(ON)
of the MOSFETs. The maximum
current limit is determined by the minimum MOSFET
on-resistance. Data sheets typically specify nominal
and maximum values for R
DS(ON)
, but not a minimum.
A reasonable assumption is that the minimum R
DS(ON)
lies the same percentage below the typical value as the
maximum lies above it. Consult the MOSFET manufacturer
for further guidelines.
To further limit current in the event of a short-circuit to
ground, the LTC3812-5 includes foldback current limiting.
If the output falls by more than 60%, then the maximum
sense voltage is progressively lowered to about one tenth
of its full value.
Be aware also that when the fault timeout is enabled for
the external NMOS regulator, an over current limit may
cause the output to fall below the minimum 4.5V UV
threshold. This condition will cause a linear regulator
timeout/restart sequence as described in the Linear Regula-
tor Timeout section if this condition persists.
RUN/SOFT-START FUNCTION
The RUN/SS pin is a multipurpose pin that provides a soft-
start function and a means to shut down the LTC3812-5.
Soft-start reduces the input supply’s surge current by
controlling the ramp rate of the output voltage, eliminates
output overshoot and can also be used for power supply
sequencing.
Pulling RUN/SS below 1.5V puts the LTC3812-5 into a low
quiescent current shutdown (I
Q
= 224μA). This pin can be
driven directly from logic as shown in Figure 14. Releasing
the RUN/SS pin allows an internal 1.4μA current source to
charge up the soft-start capacitor, C
SS
. When the voltage on
RUN/SS reaches 1.5V, the LTC3812-5 turns on and begins
regulating the output to V
FB
= V
SS
– 1.5V. As the RUN/SS
voltage increases from 1.5V to 2.3V, the output voltage is
raised from 0% to 100% of its regulated value. Current
foldback, forced continuous mode and fault timeout are
disabled during this soft-start phase and PGOOD signal is
forced low. The RUN/SS voltage continues to charge until
it reaches its internally clamped value of 4V.
If RUN/SS starts at 0V, the delay before starting is
approximately:
t
DELAY,START
=
1.5V
1.4µA
C
SS
= 1.1s/µF
()
C
SS
plus an additional delay, before the output will reach its
regulated value of:
t
DELAY,REG

0.8V
1.4µA
C
SS
= 0.6s/µF
()
C
SS
The start delay can be reduced by using diode D1 in
Figure 14.
APPLICATIONS INFORMATION
Figure 14. RUN/SS Pin Interfacing
3.3V
OR 5V
RUN/SS
D1
C
SS
38125 F14
RUN/SS
C
SS