User's Manual

Updated
2008-09-08
File
LEO2 Platform Hardware Manual
Rev.
V1.0
LGE Proprietary
５
MCTR Lab.
The ARM processor is used to control the LTE UE modem logic. The processor has 1
ARM926EJ-S core and peripheral controllers. 2
3
ARM Processor 4
- ARM926EJ-S core max. 333MHz, 16KB-I/D cache, configurable TMC-I/D size, MMU, 5
TLB, JTAG and ETM trace module (multiplexed interfaces). 6
- 32KByte Rom (code customizable) 8KByte common SRAM. 7
- High performance linked list 8 channels DMA. 8
- Ethernet MII, management interface 9
- USB2.0 High speed device 10
- Ext. memory interface : 16bit DDR1@200MHz 11
- Flash interface: 8bits NAND and Serial. 12
- 10 independent Timers with programmable prescaler. 13
- RTC - WDOG - SYSCTR - MISC internal control registers. 14
- JTAG (IEEE1149.1) interface. 15
- Current clock frequency setting : ARM Core 300MHz, Bus 150MHz, SDRAM 150MHz 16
17
Memory 18
The memory capacity and speed grade, that is on this board, are 19
- SDRAM : 512Mbits, 16bits data access, DDR @ 150MHz 20
- NAND Flash : 1Gbits, 8bits parallel, code stored. 21
- Serial Flash : 64Mbits, boot loader stored. 22
23
External Interface 24
The LEO2-A Platform supports external interface for diagnostic monitoring and user data 25
transfer. 26
- High speed USB2.0 27
- 100Mbps Ethernet 28
29
Interrupt 30
9 interrupt inputs are from interrupt handler in Turbo decoder0 FPGA. 31
32
33
34
3.3 Debugger Interface 35
The LEO2-A platform support debugging interface, JTAG and ETM, for ARM926 36
37
ARM926 core 38
- JTAG : CON12 39
- ETM9 : CON11 40
41
42
43