Datasheet

ManualsBrandsKEMET ManualsCapacitorsCeramic Capacitor 1.8nF, 50VDC, 0603, ±5 %

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Benets

• −55°Cto+125°Coperatingtemperaturerange

• Lead (Pb)-free, RoHS, and REACH compliant

• EIA 0201, 0402, 0603, 0805, 1206, 1210, 1808, 1812, 1825,

2220, and 2225 case sizes

• DCvoltageratingsof10V,16V,25V,50V,100V,200V,and

250V

• Capacitanceofferingsrangingfrom0.5pFupto0.47μF

• Availablecapacitancetolerancesof±0.10pF,±0.25pF,

±0.5pF,±1%,±2%,±5%,±10%,and±20%

• No piezoelectric noise

• Extremely low ESR and ESL

• Highthermalstability

• Highripplecurrentcapability

Overview

KEMET’sC0Gdielectricfeaturesa125°Cmaximum

operatingtemperatureandisconsidered“stable.”

TheElectronicsComponents,Assemblies&Materials

Association(EIA)characterizesC0Gdielectricasa

ClassImaterial.Componentsofthisclassicationare

temperaturecompensatingandaresuitedforresonant

circuitapplicationsorthosewhereQandstabilityof

capacitancecharacteristicsarerequired.C0Gexhibitsno

changeincapacitancewithrespecttotimeandvoltageand

boastsanegligiblechangeincapacitancewithreferenceto

ambienttemperature.Capacitancechangeislimitedto

±30ppm/ºCfrom−55°Cto+125°C.

SurfaceMountMultilayerCeramicChipCapacitors(SMDMLCCs)

C0G Dielectric, 10 – 250 VDC (Commercial Grade)

Ordering Information

C 1206 C 104 J 3 G A C TU

Ceramic

Case Size

(L" x W")

Specication/

Series

Capacitance

Code(pF)

Capacitance

Tolerance

Rated

Voltage

(VDC)

Dielectric

FailureRate/

Design

Termination

Finish

Packaging/

Grade (C-Spec)

0201

0402

0603

0805

1206

1210

1808

1812

1825

2220

2225

C =

Standard

Twosignicantdigits

+numberofzeros.

Use9for1.0–9.9pF

Use8for0.5–.99pF

e.g.,2.2pF=229

e.g.,0.5pF=508

B=±0.10pF

C=±0.25pF

D=±0.5pF

F=±1%

G=±2%

J=±5%

K=±10%

M=±20%

8 = 10

4 = 16

3 = 25

5 = 50

1 = 100

2 = 200

A = 250

G = C0G A = N/A C=100%MatteSn See

“Packaging

C-Spec

Ordering

Options

Table”below

Flexible termination option is available. Please see FT-CAP product bulletin C1062_C0G_FT-CAP_SMD

Additional capacitance tolerance offerings may be available. Contact KEMET for details.

Additional termination nish options may be available. Contact KEMET for details.

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Summary of content (20 pages)

PAGE 1
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Overview KEMET’s C0G dielectric features a 125°C maximum operating temperature and is considered “stable.” The Electronics Components, Assemblies & Materials Association (EIA) characterizes C0G dielectric as a Class I material.
PAGE 2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Packaging C-Spec Ordering Options Table Packaging/Grade Ordering Code (C-Spec) Packaging Type1 Bulk Bag/Unmarked 7" Reel/Unmarked 13" Reel/Unmarked 7" Reel/Unmarked/2 mm pitch2 13" Reel/Unmarked/2 mm pitch2 Not required (Blank) TU 7411 (EIA 0603 and smaller case sizes) 7210 (EIA 0805 and larger case sizes) 7081 7082 Default packaging is “Bulk Bag”.
PAGE 3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Dimensions – Millimeters (Inches) L W B T S EIA Size Code Metric Size Code 0201 0603 0402 1005 0603 1608 0805 2012 1206 3216 1210 3225 1808 4520 1812 4532 1825 4564 2220 5650 2225 5664 L Length W Width 0.60 (0.024) ±0.03 (0.001) 1.00 (0.040) ±0.05 (0.002) 1.60 (0.063) ±0.15 (0.006) 2.00 (0.079) ±0.20 (0.008) 3.20 (0.126) ±0.20 (0.008) 3.20 (0.126) ±0.20 (0.008) 4.
PAGE 4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Electrical Parameters/Characteristics Item Parameters/Characteristics Operating Temperature Range Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC) Aging Rate (Maximum % Capacitance Loss/Decade Hour) Dielectric Withstanding Voltage (DWV) 1 2 Dissipation Factor (DF) Maximum Limit at 25ºC 3 Insulation Resistance (IR) Limit at 25°C −55°C to +125°C ±30 ppm/ºC 0% 250% of rated v
PAGE 5
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Table 1A – Capacitance Range/Selection Waterfall (0201 – 1206 Case Sizes) 50 200 250 CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF
PAGE 6
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Table 1A – Capacitance Range/Selection Waterfall (0201 – 1206 Case Sizes) cont'd 50 100 200 16 25 250 10 BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BB BD BD BB BB BD BD CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF CF
PAGE 7
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Table 1B – Capacitance Range/Selection Waterfall (1210 – 2225 Case Sizes) 50 A 5 1 2 A 250 250 2 KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE KE 250 100 1 100 5 250 A 100 2 200 1 200 5 200 FB FB FB FB FB FB FB FB FC FE FE FE FE FG FC FC FF FF FF FF FF FG FG FG FB FB FB
PAGE 8
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Table 2A – Chip Thickness/Tape & Reel Packaging Quantities Paper Quantity1 Plastic Quantity Thickness Code Case Size1 Thickness ± Range (mm) 7" Reel 13" Reel 7" Reel 13" Reel AB BB BD CF CH DM DN DP DE DF DG EB EC ED EE EF EH FB FC FE FF FG FH FM FJ FK NC LF GB GD GH GG GK GJ GN GM HB HE HG JB JD JE JF JG JL KE 0201 0402 0402 0603 0603 0805 0805 0805 0805 0805 0805 1206 1206 1206 1206 1206
PAGE 9
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Table 2B – Bulk Packaging Quantities Loose Packaging Packaging Type Bulk Bag (default) Packaging C-Spec1 N/A 2 Case Size Packaging Quantities (pieces/unit packaging) EIA (in) Metric (mm) 0402 0603 0805 1206 1210 1808 1005 1608 2012 3216 3225 4520 1812 1825 2220 2225 4532 4564 5650 5664 Minimum Maximum 50,000 1 20,000 The "Packaging C-Spec" is a 4 to 8 digit code which identifies the
PAGE 10
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351 EIA Size Code Metric Size Code 0201 Density Level A: Maximum (Most) Land Protrusion (mm) Density Level B: Median (Nominal) Land Protrusion (mm) Density Level C: Minimum (Least) Land Protrusion (mm) C Y X V1 V2 C Y X V1 V2 C Y X V1 V2 0603 0.38 0.56 0.52 1.80 1.00 0.33 0.46 0.42 1.50 0.80 0.
PAGE 11
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Soldering Process Recommended Soldering Technique: • Solder wave or solder reflow for EIA case sizes 0603, 0805 and 1206 • All other EIA case sizes are limited to solder reflow only Recommended Reflow Soldering Profile: KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual), convection, IR or vapor phase reflow techniques.
PAGE 12
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Table 4 – Performance & Reliability: Test Methods and Conditions Stress Reference Test or Inspection Method Terminal Strength JIS–C–6429 Appendix 1, Note: Force of 1.8 kg for 60 seconds. Board Flex JIS–C–6429 Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm for C0G. Flexible termination system – 3.0 mm (minimum). Magnification 50 X.
PAGE 13
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Construction Detailed Cross Section Barrier Layer (Ni) Termination Finish (100% Matte Sn) Dielectric Material (CaZrO3) Dielectric Material (CaZrO3) End Termination/ External Electrode (Cu) Inner Electrodes (Ni) End Termination/ External Electrode (Cu) Barrier Layer (Ni) Termination Finish (100% Matte Sn) Inner Electrodes (Ni) Capacitor Marking (Optional): Laser marking option is not available o
PAGE 14
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Tape & Reel Packaging Information KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with EIA Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for details on reeling quantities for commercial chips.
PAGE 15
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Figure 1 – Embossed (Plastic) Carrier Tape Dimensions P2 T T2 ØDo [10 pitches cumulative tolerance on tape ± 0.2 mm] Po E1 Ao F Ko B1 E2 Bo S1 W P1 T1 Center Lines of Cavity ØD Cover Tape B 1 is for tape feeder reference only, including draft concentric about B o.
PAGE 16
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Figure 2 – Punched (Paper) Carrier Tape Dimensions T Po ØDo [10 pitches cumulative tolerance on tape ± 0.
PAGE 17
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Packaging Information Performance Notes 1. Cover Tape Break Force: 1.0 Kg minimum. 2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be: Tape Width Peel Strength 8 mm 0.1 to 1.0 Newton (10 to 100 gf) 12 and 16 mm 0.1 to 1.3 Newton (10 to 130 gf) The direction of the pull shall be opposite the direction of the carrier tape travel.
PAGE 18
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Figure 6 – Reel Dimensions Full Radius, See Note W3 (Includes flange distortion at outer edge) Access Hole at Slot Location (Ø 40 mm minimum) W2 D A (See Note) N C (Arbor hole diameter) B (see Note) (Measured at hub) W1 (Measured at hub) If present, tape slot in core for tape start: 2.5 mm minimum width x 10.
PAGE 19
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) Figure 7 – Tape Leader & Trailer Dimensions Embossed Carrier Carrier Tape Punched Carrier 8 mm & 12 mm only END Round Sprocket Holes START Top Cover Tape Elongated Sprocket Holes (32 mm tape and wider) Trailer 160 mm Minimum Components 100 mm Minimum Leader 400 mm Minimum Top Cover Tape Figure 8 – Maximum Camber Elongated sprocket holes (32 mm & wider tapes) Carrier Tape Round Sprocket Ho
PAGE 20
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) C0G Dielectric, 10 – 250 VDC (Commercial Grade) KEMET Electronic Corporation Sales Offices For a complete list of our global sales offices, please visit www.kemet.com/sales. Disclaimer All product specifications, statements, information and data (collectively, the “Information”) in this datasheet are subject to change.