Intel Pentium 4 Processor VR-Down Design Guidelines

Intel
®
Pentium
®
4 Processor VR-Down Design Guidelines
7
Table 2, Load Line at Processor Socket
Voltage Deviation from VID Setting (V)
Icc (A)
Minimum Typical Maximum
0 -0.050 -0.025 0.000
5 -0.057 -0.033 -0.008
10 -0.065 -0.040 -0.015
15 -0.072 -0.047 -0.023
20 -0.080 -0.055 -0.030
25 -0.087 -0.063 -0.038
30 -0.095 -0.070 -0.045
35 -0.103 -0.077 -0.053
40 -0.110 -0.085 -0.060
45 -0.118 -0.092 -0.067
50 -0.125 -0.100 -0.075
55 -0.133 -0.108 -0.083
60 -0.140 -0.115 -0.090
65 -0.148 -0.123 -0.097
70 -0.155 -0.130 -0.105
Notes:
1. The load line specification includes both static and transient limits.
2. This load line specification applies to both the Pentium 4 processor in the 478-pin package and the Pentium 4 processor with
512-KB L2 cache on 0.13 micron process.
3. The VID voltage has been normalized to zero; i.e., the table shows the voltage offset to the VID voltage
1.4 Processor Electrical And Thermal Current Support EXPECTED
System boards supporting Intel Pentium 4 must include voltage regulator designs compliant to
motherboard electrical and thermal standards. This includes full electrical support of 70A Icc_max
specifications and robust cooling solutions to support 63A thermal design current (TDC) indefinitely
within the envelope of the system’s operating conditions.
TDC is the sustained (DC equivalent) current that the Pentium 4 processor is capable of drawing
indefinitely and defines the current to use for worst-case voltage regulator temperature assessment. At
TDC, voltage regulator components (such as switching FETs and inductors) reach maximum
temperature and may heat the motherboard layers and neighboring components above their thermal
limits. Actual component and board temperatures are established by the envelope of system operating
conditions. This includes but is not limited to the voltage regulator layout, processor fan selection,
ambient temperature, chassis configuration, etc. To avoid heat related failures, system boards must be
validated for thermal compliance at TDC under the envelope of the system’s operating conditions.
1.5 No-Load Operation EXPECTED
The VR should operate in a no-load condition: i.e., with no processor installed. The VR does not need
to meet the output regulation specifications described in section 1.3, but its output must not exceed
110% of the value of the maximum DC output voltage, and it must not trigger over-voltage fault
detection circuitry.