User manual

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INFORMATION OF ICS
IC GM5221 PQFP-208 (System Interface)
Pin No. Pin Name Description
81 GPIO0 General-purpose input/output signals
82 GPIO1 [Bi-directional, Schmitt trigger, 5V-tolerant]
83 GPIO2
84 GPIO3
85 GPIO4
88 GPIO5
89 GPIO6
90 GPIO7/IRQin General-purpose input/output signals [Bi-directional, Schmitt trigger, 5V-
91 GPIO8/IRQout tolerant] or OCM interrupt and chip status.
92 GPIO9/SCL General-purpose input/output signals [Bi-directional, Schmitt trigger, 5V-
93 GPIO10/SDA tolerant] or master device on serial interface bus.
98 GPIO11/PWM0 General-purpose input/output signals or PWM signals. [Bi-directional,
99 GPIO12/PWM1 Schmitt trigger, 5V-tolerant]
100 GPIO13/PWM2
101 GPIO14/PWM3
69 GPIO15 General-purpose input/output signals [Bi-directional, Schmitt trigger, 5V-tolerant]
77 DDC_SCL_VGA DDC2Bi clock for VGA Port
78 DDC_SDA_VGA DDC2Bi data for VGA Port [internal 10KΩ, pull-up resistor]
79 DDC_SCL_DVI DDC2Bi and HDCP clock for DVI Port
80 DDC_SDA_DVD DC2Bi and HDCP data for DVI Port [internal 10KΩ, pull-up resistor]
178 RESETn Hardware Reset (active low) [Schmitt trigger, 5V-tolerant] Connect to
ground with 0.01uF (or larger) capacitor. See section, Chip
Initialization, for detail
172 LBADC_VDD_3.3 Analog 3.3V power supply for general-purpose ADC
173 LBADC_IN1 LBADC channel 1
174 LBADC_IN2 LBADC channel 2
175 LBADC_IN3 LBADC channel 3
176 LBADC_RETURN Analog Ground (signal return path) for LBADC channels 1, 2 and 3
177 LBADC_GND Ground
71 HOST_SCL/UART_DI Host input clock or 186 UART Data In or JTAG clock signal. [Input,
Schmitt trigger, 5V-Tolerant]
72 HOST_SCL/UART_DO Host input data or 186 UART Data out or JTAG mode signal.
[Bi-directional, Schmitt trigger, slew rate limited, 5V-Tolerant]
66 JTAG_TDIJTAG Data input signal.
64 JTAG_TDO JTAG data output signal.
56 JTAG_RESET JTAG reset signal.
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