FUJITSU SEMICONDUCTOR DATA SHEET DS04-21358-4E ASSP Single Serial Input PLL Frequency Synthesizer On-chip 2.5 GHz Prescaler MB15E07SL ■ DESCRIPTION The Fujitsu MB15E07SL is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 2.5 GHz prescaler. The 2.5 GHz prescaler has a dual modulus division ratio of 32/33 or 64/65 enabling pulse swallowing operation. The supply voltage range is between 2.4 V and 3.6 V.
MB15E07SL (Continued) • Dual modulus prescaler: 32/33 or 64/65 • Serial input 14-bit programmable reference divider: R = 3 to 16,383 • Serial input programmable divider consisting of: - Binary 7-bit swallow counter: 0 to 127 - Binary 11-bit programmable counter: 3 to 2,047 • Software selectable charge pump current • On-chip phase control for phase comparator • Operating temperature: Ta = –40 to +85°C • Pin compatible with MB15E07, MB15E07L ■ PIN ASSIGNMENTS 16-pin SSOP OSCIN 1 16 φR OSCOUT 2 15 φP
MB15E07SL ■ PIN DESCRIPTIONS Pin no. SSOP BCC Pin name I/O 1 16 OSCIN I Programmable reference divider input. Connection to a TCXO. 2 1 OSCOUT O Oscillator output. 3 2 VP – Power supply voltage input for the charge pump. 4 3 VCC – Power supply voltage input. 5 4 DO O Charge pump output. Phase of the charge pump can be selected via programming of the FC bit. 6 5 GND – Ground. 7 6 Xfin I Prescaler complementary input, which should be grounded via a capacitor.
MB15E07SL ■ BLOCK DIAGRAM fr (16) OSCIN 1 Reference oscillator circuit Phase comparator (15) 16 φR (14) 15 φP (1) OSCOUT 2 Binary 14-bit reference counter SW FC LDS CS 14-bit latch 4-bit latch (2) VP 3 Lock detector fp LD/fr/fp selector (13) 14 LD/fout .. VCC C N T (3) 4 19-bit shift register Charge pump DO (4) 5 Current switch ... 7-bit latch Binary 7-bit swallow counter (12) 13 ZC ...
MB15E07SL ■ ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Input voltage Output voltage Storage temperature Symbol Condition VCC Rating Unit Min Max – –0.5 4.0 V VP – VCC 6.0 V VI – –0.5 VCC +0.5 V VO Except Do GND VCC V VO Do GND VP V Tstg – –55 +125 °C Remark WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
MB15E07SL ■ ELECTRICAL CHARACTERISTICS (VCC = 2.4 to 3.6 V, Ta = –40 to +85°C) Parameter Symbol Condition Power supply current*1 ICC*1 Power saving current Operating frequency Input sensitivity “H” level input voltage “L” level input voltage “H” level input current “L” level input current “H” level input current “L” level input current “H” level input current “L” level input current Unit Min Typ Max fin = 2500 MHz, VCC = VP = 2.7 V (VCC = VP = 3.0 V) – 3.5 (4.
MB15E07SL *3 : AC coupling. 1000 pF capacitor is connected under the condition of Min operating frequency. *4 : The symbol “–” (minus) means direction of current flow. *5 : VCC = VP = 3.0 V, Ta = +25°C (|I3| – |I4|) / [(|I3| + |I4|) /2] × 100(%) *6 : VCC = VP = 3.0 V, Ta = +25°C [(|I2| – |I1|) /2] / [(|I1| + |I2|) /2] × 100(%) (Applied to each IDOL, IDOH) *7 : VCC = VP = 3.
MB15E07SL ■ FUNCTIONAL DESCRIPTION 1.
MB15E07SL Programmable Counter MSB LSB Data Flow 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 C N T A 1 A 2 A 3 A 4 A 5 A 6 A 7 N 1 N 2 N 3 N 4 N 5 N 6 N 7 N 8 N 9 N 10 N 11 CNT : Control bit N1 to N11 : Divide ratio setting bits for the programmable counter (3 to 2,047) A1 to A7 : Divide ratio setting bits for the swallow counter (0 to 127) [Table 1] [Table 3] [Table 4] Note: Data input with MSB first. Table 2.
MB15E07SL Table 5. Prescaler Data Setting SW Prescaler divide ratio H 32/33 L 64/65 Table 6. Charge Pump Current Setting CS Current value H ±6.0 mA L ±1.5 mA Table 7. LD/fout Output Select Data Setting LD/fOUT output signal LDS H fout signal L LD signal (2) Relation between the FC Input and Phase Characteristics The FC bit changes the phase characteristics of the phase comparator.
MB15E07SL When designing a synthesizer, the FC pin setting depends on the VCO and LPF characteristics. * : When the LPF and VCO characteristics are similar to (1), set FC bit high. (1) * : When the VCO characteristics are similar to (2), set FC bit low. PLL LPF VCO VCO Output Frequency (2) LPF Output Voltage 3. Do Output Control Table 9. ZC Pin Setting ZC pin Do output H Normal output L High impedance 4. Power Saving Mode (Intermittent Mode Control Circuit) Table 10.
MB15E07SL Note : PS pin must be set “L” for Power-ON. OFF ON tV ≥ 1 µs VCC Clock Data LE tPS ≥ 100 ns PS (1) (2) (3) (1) PS = L (power saving mode) at Power ON (2) Set serial data 1 µs later after power supply remains stable (VCC > 2.2 V). (3) Release power saving mode (PS: L → H) 100 ns later after setting serial data.
MB15E07SL ■ SERIAL DATA INPUT TIMING 1st data 2nd data Control bit Invalid data ∼ Data MSB LSB ∼ ∼ Clock t1 t2 t3 t6 t7 LE ∼ t4 t5 On the rising edge of the clock, one bit of data is transferred into the shift register. Parameter Min Typ Max Unit Parameter Min Typ Max Unit t1 20 – – ns t5 100 – – ns t2 20 – – ns t6 20 – – ns t3 30 – – ns t7 100 – – ns t4 30 – – ns Note : LE should be “L” when the data is transferred into the shift register.
MB15E07SL ■ PHASE COMPARATOR OUTPUT WAVEFORM fr fp t WU t WL LD [FC = “H”] DO [FC = “L”] DO Notes : • Phase error detection range: –2π to +2π • Pulses on Do signal during locked state are output to prevent dead zone. • LD output becomes low when phase is tWU or more. LD output becomes high when phase error is tWL or less and continues to be so for three cycles or more. • tWU and tWL depend on OSCIN input frequency. tWU > 2/fosc (s) (e. g. tWU > 156.3 ns, fosc = 12.8 MHz) tWU < 4/fosc (s) (e. g.
MB15E07SL ■ MEASURMENT CIRCUIT (for Measuring Input Sensitivity fin/OSCIN) 1000 pF 0.1 µF 1000 pF 0.
MB15E07SL ■ TYPICAL CHARACTERISTICS 1. fin input sensitivity Input sensitivity Pfin (dBm) Input sensitivity − Input frequency (Prescaler: 64/65) Ta = +25 °C 10 0 SPEC −10 −20 −30 VCC = 2.4 V VCC = 3.0 V −40 VCC = 3.6 V −50 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 Input frequency fin (MHz) Input sensitivity − Input frequency (Prescaler: 32/33) Ta = +25 °C 10 Input sensitivity Pfin (dBm) 0 SPEC −10 −20 −30 VCC = 2.7 V VCC = 3.0 V −40 VCC = 3.
MB15E07SL 2. OSCIN input sensitivity Input sensitivity − Input frequency Ta = +25 °C 10 Input sensitivity VOSC (dBm) SPEC 0 −10 −20 −30 −40 VCC = 2.4 V VCC = 3.0 V −50 VCC = 3.
MB15E07SL 3. Do output current 1.5 mA mode VDO - IDO Ta = +25°C VCC = 3.0 V Vp = 3.0 V Charge pump output current IDO (mA) 10.00 2.000 /div IDOL 0 IDOH –10.00 0 4.800 .6000/div Charge pump output voltage VDO (V) 6.0 mA mode VDO - IDO Ta = +25°C VCC = 3.0 V Vp = 3.0 V Charge pump output current IDO (mA) 10.00 IDOL 2.000 /div 0 IDOH –10.00 0 4.800 .
MB15E07SL 4. fin input impedance 1 : 12.646 Ω –57.156 Ω 1 GHz 2 : 22.156 Ω –12.136 Ω 1.5 GHz 4 3 : 33.805 Ω 11.869 Ω 2 GHz 4 : 23.715 Ω 8.9629 Ω 2.5 GHz 3 2 1 START 500.000 000 MHz STOP 2 500.000 000 MHz 5. OSCIN input impedance 1: 9.917 Ω –3.643 Ω 3 MHz 2 : 3.7903 Ω –4.812 Ω 10 MHz 3: 4 1.574 Ω –3.4046 Ω 20 MHz 3 12 4 : 453.12 Ω –1.9213 Ω 40 MHz START 1.000 000 MHz STOP 50.
MB15E07SL ■ REFERENCE INFORMATION Test Circuit S.G fVCO = 810.45 MHz KV = 17 MHz/V fr = 25 kHz fOSC = 14.4 MHz LPF OSCIN fin LPF Do 9.1 kΩ 4.2 kΩ 4700 pF Spectrum Analyzer VCC =VP = 3.0 V VVCO = 2.3 V Ta = +25 °C CP : 6 mA mode VCO 1500 pF 0.047 µF PLL Reference Leakage REF –5.0 dBm 10 dB/ ATT 10 dB MKR 25.0 kHz –78.0 dB RBW 1 kHz SAMPLE VBW 1 kHz SWP 1.0 s SPAN 200 kHz CENTER 810.000 MHz PLL Phase Noise REF –5.0 dBm 10 dB/ ATT 10 dB MKR 2.28 kHz –53.
MB15E07SL (Continued) PLL Lock Up time 810 MH→826 MHz within ± 1 kHz Lch→Hch 1.30 ms PLL Lock Up time 826 MH→810 MHz within ± 1 kHz Hch→Lch 1.28 ms 846.000 MHz 838.000 MHz 826.000 MHz 818.000 MHz 806.000 MHz 798.000 MHz 500.0 µs/div 500.0 µs/div 826.004000 MHz 810.004000MHz 826.000000 MHz 810.000000MHz 825.996000 MHz 809.996000MHz 500.0 µs/div 500.
MB15E07SL ■ APPLICATION EXAMPLE VP 10 kΩ OUTPUT VCO LPF 12 kΩ 12 kΩ 10 kΩ Lock Det. From a controller φR φP LD/fout ZC PS LE Data Clock 16 15 14 13 12 11 10 9 MB15E07SL 1 2 3 4 5 6 7 8 OSCIN OSCOUT VP VCC DO GND Xfin fin 1000 pF 1000 pF 1000 pF 0.1 µF 0.1 µF TCXO VP: 5.5 V Max Notes : • SSOP-16 • In case of using a crystal resonator, it is necessary to optimize matching between the crystal and this LSI, and perform detailed system evaluation.
MB15E07SL ■ USAGE PRECAUTIONS To protect against damage by electrostatic discharge, note the following handling precautions: -Store and transport devices in conductive containers. -Use properly grounded workstations, tools, and equipment. -Turn off power before inserting device into or removing device from a socket. -Protect leads with a conductive sheet when transporting a board-mounted device.
MB15E07SL ■ PACKAGE DIMENSIONS Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max). Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 16-pin plastic SSOP (FPT-16P-M05) *1 5.00±0.10(.197±.004) 0.17±0.03 (.007±.001) 9 16 *2 4.40±0.10 6.40±0.20 (.173±.004) (.252±.008) INDEX Details of "A" part +0.20 1.25 –0.10 +.008 .049 –.004 LEAD No. 1 8 0.65(.
MB15E07SL (Continued) 16-pad plastic BCC (LCC-16P-M06) 4.55±0.10 (.179±.004) 0.80(.031)MAX Mounting height 14 3.40(.134)TYP 0.65(.026) TYP 0.40±0.10 (.016±.004) 9 0.325±0.10 (.013±.004) 9 14 0.80(.031) REF INDEX AREA 3.40±0.10 (.134±.004) 2.45(.096) TYP "A" 1 6 0.075±0.025 (.003±.001) (Stand off) 6 Details of "A" part 0.75±0.10 (.030±.004) 1.15(.045) REF "B" 1.725(.068) REF 1 Details of "B" part 0.60±0.10 (.024±.004) 0.05(.002) 0.40±0.10 (.016±.004) C 0.60±0.10 (.024±.
MB15E07SL FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering.