Datasheet

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May 2012

FSL136MRT • Rev. 1.0.0

FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)

FSL136MRT

Green-Mode Fairchild Power Switch (FPS™)

Features

 Internal Avalanched-Rugged 650V SenseFET

 Advanced Soft Burst-Mode Operation for Low

Standby Power and Low Audible Noise

 Random Frequency Fluctuation for Low EMI

 Pulse-by-Pulse Current Limit

 Various Protection Functions: Overload Protection

(OLP), Over-Voltage Protection (OVP), Abnormal

Over-Current Protection (AOCP), Internal Thermal

Shutdown (TSD) with Hysteresis, and Under-Voltage

Lockout (UVLO) with Hysteresis

 Low Operating Current (0.4mA) in Burst Mode

 Internal Startup Circuit

 Built-in Soft-Start: 15ms

 Auto-Restart Mode

Applications

 Power Supply for STB Home Appliances and

DVD Combination

Description

The FSL136MRT is an integrated Pulse Width

Modulation (PWM) controller and SenseFET specifically

designed for offline Switch-Mode Power Supplies

(SMPS) with minimal external components. The PWM

controller includes an integrated fixed-frequency

oscillator, Under-Voltage Lockout (UVLO), Leading-

Edge Blanking (LEB), optimized gate driver, internal

soft-start, temperature-compensated precise current

sources for loop compensation, and self-protection

circuitry. Compared with a discrete MOSFET and PWM

controller solution, the FSL136MRT can reduce total

cost, component count, size, and weight; while

simultaneously increasing efficiency, productivity, and

system reliability. This device provides a basic platform

suited for cost-effective design of a flyback converter.

Ordering Information

Part Number Package

Operating

Junction

Temperature

Current

Limit

DS(ON)

(Max.)

Output Power Table

(2)

Replaces

Device

230V

± 15%

(3)

85~265V

Adapter

(4)

Open

Frame

(5)

Adapter

(4)

Open

Frame

(5)

FSL136MRT

TO-220F

6-Lead

(1)

W-Forming

-40°C ~

+125°C

2.15A

4Ω

35W 50W 24W 35W

KA5M0365RY

DTU

Notes:

1. Pb-free package per JEDEC J-STD-020B.

2. The junction temperature can limit the maximum output power.

3. 230V

or 100/115V

with voltage doubler.

4. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature.

5. Maximum practical continuous power in an open-frame design at 50°C ambient temperature.

Summary of content (13 pages)

PAGE 1
FSL136MRT Green-Mode Fairchild Power Switch (FPS™) Features Description  Internal Avalanched-Rugged 650V SenseFET  Advanced Soft Burst-Mode Operation for Low The FSL136MRT is an integrated Pulse Width Modulation (PWM) controller and SenseFET specifically designed for offline Switch-Mode Power Supplies (SMPS) with minimal external components.
PAGE 2
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™) Application Circuit VO AC IN VSTR Drain GND VCC FB Figure 1. Typical Application Circuit Internal Block Diagram VSTR VCC Drain 6 3 1 VBURST ICH 0.30V / 0.45V Soft Burst VREF VCC Good 7.5V / 12V Random VCC VREF 2.0 A IDELAY FB Soft-Start 90 A IFB OSC PWM 4 S Q R Q Gate Driver 3R R NC LEB (350ns) 5 VAOCP VSD TSD S Q R Q 2 GND 7.0V VCC VCC Good VOVP 24.5V Figure 2.
PAGE 3
Figure 3. Pin Configuration (Top View) Pin Definitions Pin # Name 1 Drain SenseFET Drain. High-voltage power SenseFET drain connection. 2 GND Ground. This pin is the control ground and the SenseFET source. 3 VCC Power Supply. This pin is the positive supply input, which provides the internal operating current for both startup and steady-state operation. 4 FB Feedback. This pin is internally connected to the inverting input of the PWM comparator.
PAGE 4
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max.
PAGE 5
TJ = 25°C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. Unit SenseFET Section BVDSS Drain-Source Breakdown Voltage VCC=0V, ID=250μA IDSS Zero-Gate-Voltage Drain Current VDS=520V, TA=125°C Drain-Source On-State Resistance VGS=10V, ID =1A 3.5 CISS Input Capacitance(12) VDS=25V, VGS=0V, f=1MHz 290 pF COSS Output Capacitance(12) VDS=25V, VGS=0V, f=1MHz 45 pF CRSS Reverse Transfer Capacitance(12) VDS=25V, VGS=0V, f=1MHz 5.5 pF Rise Time VDS=325V, ID=3.
PAGE 6
TJ=25°C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. Unit 0.3 0.4 0.5 mA 1.00 1.35 mA Total Device Section IOP Operating Supply Current, (Control Part in Burst Mode) VCC=14V, VFB=0V IOPS Operating Switching Current, (Control Part and SenseFET Part) VCC=14V, VFB=2V Start Current VCC=11V (Before VCC Reaches VSTART) 85 120 155 μA Startup Charging Current VCC=VFB=0V, VSTR=40V 0.7 1.0 1.
PAGE 7
Characteristic graphs are normalized at TA=25°C. 1.40 1.30 1.30 1.20 1.20 1.10 1.10 Normalized Normalized 1.40 1.00 1.00 0.90 0.90 0.80 0.80 0.70 0.70 0.60 -40'C -20'C 0'C 0.60 25'C 50'C 75'C 90'C 110'C 120'C 125'C Temperature [ °C] -40'C -20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C Temperature [ °C] Figure 5. Operating Supply Current (IOP) vs. TA Figure 6. 1.30 1.30 1.20 1.20 1.10 1.10 Normalized 1.40 Normalized 1.40 Operating Switching Current (IOPS) vs. TA 1.00 1.
PAGE 8
1.40 1.40 1.30 1.30 1.20 1.20 1.10 1.10 Normalized Normalized Characteristic graphs are normalized at TA=25°C. 1.00 0.90 1.00 0.90 0.80 0.80 0.70 0.70 0.60 0.60 -40'C -20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C -40'C -20'C 0'C Temperature [ °C] Figure 11. UVLO Threshold Voltage (VSTART) vs. TA Figure 12. UVLO Threshold Voltage (VSTOP) vs. TA 1.40 1.30 1.30 1.20 1.20 1.10 1.10 Normalized Normalized 1.40 1.00 0.90 1.00 0.90 0.80 0.80 0.70 0.70 0.60 0.
PAGE 9
3. Feedback Control: This device employs CurrentMode control, as shown in Figure 18. An opto-coupler (such as the FOD817) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the RSENSE resistor makes it possible to control the switching duty cycle. When the reference pin voltage of the shunt regulator exceeds the internal reference voltage of 2.
PAGE 10
B increasing until it reaches 7.0V, when the switching operation is terminated, as shown in Figure 20. The delay for shutdown is the time required to charge CFB from 2.4V to 7.0V with 2.0µA. This protection is implemented in Auto-Restart Mode. B Figure 20. Overload Protection 4.2 Abnormal Over-Current Protection (AOCP): When the secondary rectifier diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow through the SenseFET during the minimum turn-on time.
PAGE 11
6. Random Frequency Fluctuation (RFF): Fluctuating switching frequency of an SMPS can reduce EMI by spreading the energy over a wide frequency range. The amount of EMI reduction is directly related to the switching frequency variation, which is limited internally. The switching frequency is determined randomly by external feedback voltage and an internal free-running oscillator at every switching instant.
PAGE 12
10.16 9.96 2.74 2.34 (7.00) 3.40 3.20 (0.70) Ø3.28 3.08 (5.40) 16.07 15.67 6.90 6.50 20.00 19.00 (13.05) 24.00 23.00 (0.48) R0.55 R0.55 8.13 1.40 7.13 1.20 (1.13) 3.06 2.46 (7.15) 0.80 0.70 1 0.70 0.50 6 2.19 2,4,6 1,3,5 0.60 0.45 1.75 FSL136MRT — Green-Mode Fairchild Power Switch (FPS™) Physical Dimensions 3.48 2.88 1.27 3.81 5° NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE DOES NOT COMPLY TO ANY CURRENT PACKAGING STANDARD. B) ALL DIMENSIONS ARE IN MILLIMETERS.
PAGE 13
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™) © 2012 Fairchild Semiconductor Corporation FSL136MRT • Rev. 1.0.0 www.fairchildsemi.