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April 2014

FAN4800AU/CU • Rev. 1.0.2

FAN4800AU/CU — PFC/ PWM Controller Combination

FAN4800AU / FAN4800CU

PFC/ PWM Controller Combination

Features

 Pin-to-Pin Compatible with ML4800, FAN4800,

CM6800, and CM6800A

 PWM Configurable for Current-Mode or

Feed-Forward Voltage-Mode Operation

 Internally Synchronized Leading-Edge PFC and

Trailing-Edge PWM in One IC

 Low Operating Current

 Innovative Switching-Charge Multiplier Divider

 Average-Current-Mode for Input-Current Shaping

 PFC Over-Voltage and Under-Voltage Protections

 PFC Feedback Open-Loop Protection

 Cycle-by-Cycle Current Limiting for PFC/PWM

 Power-on Sequence Control and Soft-Start

 Line Sagging Protection

 f

RTCT

=4•f

PFC

=4•f

PWM

for FAN4800AU

 f

RTCT

=4•f

PFC

=2•f

PWM

for FAN4800CU

Applications

 Desktop PC Power Supply

 Internet Server Power Supply

 LCD TV/ Monitor Power Supply

 UPS

 Battery Charger

 DC Motor Power Supply

 Monitor Power Supply

 Telecom System Power Supply

 Distributed Power

Related Resources

 AN-8027 — FAN480X PFC+PWM Combination

Controller Application

Description

The highly integrated FAN4800AU/CU parts are

specially designed for power supplies that consist of

boost PFC and PWM. They require very few external

components to achieve versatile protections and

compensation. They are available in 16-pin DIP and

SOP packages.

The PWM can be used in current or Voltage Mode. In

Voltage Mode, feed-forward from the PFC output bus

can reduce secondary output ripple.

To evaluate FAN4800AU/CU for replacing existing

FAN4800A/C, FAN4800AS/CS, old version FAN4800

and ML4800 boards, six things must be completed

before the fine-tuning procedure:

1. Change R

resistor from the old value to a higher

resistor value: 6 M to 8 M.

2. Change RT/CT pin from the existing values to

=6.8 k and C

=1000 pF to have f

PFC

=64 kHz

and f

PWM

=64 kHz.

3. The VRMS pin needs to be 1.224 V at V

=85 V

for universal input application with line input from

85 V

to 270 V

4. Change ISENSE pin filter from the exiting values to

Filter

=51  and C

Filter

=0.01 µF for higher bandwidth.

5. At full load, the average V

VEA

must be ~4.5 V and

ripple on V

VEA

needs to be less than 400 mV.

6. For the SS pin, the soft-start current has been

reduced to half the FAN4800 capacitor.

There are two differences from FAN4800AS/CS to

FAN4800AU/CU:

 Add Line Sagging Protection

 Fix Inductance Current Instability during AC Cycle

Drop Test

Summary of content (19 pages)

PAGE 1
FAN4800AU / FAN4800CU PFC/ PWM Controller Combination Features  Pin-to-Pin Compatible with ML4800, FAN4800, CM6800, and CM6800A  PWM Configurable for Current-Mode or Feed-Forward Voltage-Mode Operation  Internally Synchronized Leading-Edge PFC and Trailing-Edge PWM in One IC           Low Operating Current Innovative Switching-Charge Multiplier Divider Description The highly integrated FAN4800AU/CU parts are specially designed for power supplies that consist of boost PFC and PWM.
PAGE 2
PFC:PWM Frequency Ratio Operating Temperature Range Part Number FAN4800AUN 1:2 FAN4800CUN 1:2 -40°C to +105°C FAN4800AUM 16-Pin Dual Inline Package (DIP) 1:1 FAN4800CUM Packing Method Package Tube 16-Pin Small Outline Package (SOP) 1:2 Tape & Reel Block Diagram VDD 13 VDD OVP 1.9V AC UVLO BI 27V/28V VDD Q S PFC OVP BOP VIN OFF Q R Debounce 30ms 2 VRMS 4 PFC ILIMIT -1.
PAGE 3
FAN4800AU/CU — PFC/ PWM Controller Combination Application Diagrams LBoost DBoost AC CVIN 1MΩ 3MΩ 1MΩ 3MΩ 10Ω Q1 CBulk RFBPFC1 10KΩ RFBPFC2 IAC OPFC 200KΩ 47nF 220nF VRMS FBPFC 36KΩ CFBPFC ISENSE RSENSE RFBPFC3 VEA RFilter CFilter CVEA1 CVEA2 10Ω RVEA IEA GND CIEA1 Q2 DF1 10KΩ CIEA2 12V RIEA CVDD VREF VDD DF2 VDD Lm 5V RFBPWM FBPWM FBPWM RT OPWM RT/CT CT Q3 10Ω SS 10KΩ CSS RAMP 12V FBPWM RFilter RD ILIMIT RILIMIT CFilter 1nF RFB1 RRAMP CFB RFB4 RFB2 5V
PAGE 4
16 16 ZXYYTT ZXYYTT FAN4800C UTM 1 FAN4800A UTM 1 F – Fairchild Logo Z – Plant Code X – 1-Digit Year Code YY – 2-Digit Week Code TT – 2-Digit Die-Run Code T – Package Type (N:DIP) M – Manufacture Flow Code Figure 4. DIP Top Mark 16 16 ZXYTT ZXYTT FAN4800A UTM 1 FAN4800C UTM 1 Figure 5. SOP Top Mark © 2011 Fairchild Semiconductor Corporation FAN4800AU/CU • Rev. 1.0.
PAGE 5
1 IEA VEA 16 2 IAC 3 ISENSE 4 VRMS 5 SS 6 FBPWM 7 RT/CT GND 10 8 RAMP ILIMIT 9 FBPFC 15 VREF 14 VDD 13 OPFC 12 OPWM 11 Figure 6. Pin Configuration (Top View) Pin Definitions Pin # Name Description 1 IEA Output of PFC Current Amplifier. The signal from this pin is compared with an internal sawtooth to determine the pulse width for the PFC gate drive. 2 IAC Input AC Current. For normal operation, this input provides a current reference for the multiplier.
PAGE 6
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter VDD DC Supply Voltage VH Voltage on SS, FBPWM, RAMP, VREF Pins Min. -0.3 Max. Unit 30 V 30.
PAGE 7
Unless otherwise noted, VDD=15 V, TA= 25°C, TA=TJ, RT=6.8 kΩ, and CT=1000 pF. Symbol Parameter Condition Min. Typ. Max. Unit 30 80 µA 2.0 2.6 5.0 mA 11 12 V 1.9 V 29 V VDD Section IDD-ST Startup Current VDD=VTH-ON-0.1V, OPFC OPWM Open IDD-OP Operating Current VDD=13 V, OPFC OPWM Open VTH-ON Turn-on Threshold Voltage 10 △VTH Hysteresis 1.3 VDD OVP 27 VDD-OVP △VDD-OVP VDD OVP Hysteresis 28 1 V Oscillator fOSC-RT/CT RT/CT Frequency RT=6.
PAGE 8
Unless otherwise noted, VDD=15 V, TA= 25°C, TA=TJ, RT=6.8 kΩ, and CT=1000 pF. Symbol Parameter Condition Min. Typ. Max. 2.45 2.50 2.55 35 42 Unit Voltage Error Amplifier VREF AV Gmv Reference Voltage (3) Open-Loop Gain Transconductance VNONINV=VINV, VVEA=3.75 V 50 70 IFBPFC-L Maximum Source Current VFBPFC=2 V, VVEA=1.5 V 40 50 IFBPFC-H Maximum Sink Current VFBPFC=3 V, VVEA=6 V IBS -50 Input Bias Current -1 VVEA-H Output High Voltage on VVEA 5.
PAGE 9
Unless otherwise noted, VDD=15 V, TA= 25°C, TA=TJ, RT=6.8 kΩ, and CT=1000 pF. Symbol Parameter Condition Min. Typ. 13 15 Max. Unit 17 V 1.5 V PFC Output Driver VGATE-CLAMP Gate Output Clamping Voltage VDD=22 V VGATE-L Gate Low Voltage VDD=15 V, IO=100 mA VGATE-H Gate High Voltage VDD=13 V, IO=100 mA 8 tR Gate Rising Time VDD=15 V, CL=4.7 nF, O/P= 2 V to 9 V 40 70 120 ns tF Gate Falling Time VDD=15 V, CL=4.
PAGE 10
Figure 7. IDD-ST vs. Temperature Figure 9. fOSC vs. Temperature Figure 10. VVREF vs. Temperature VPFC-OVP vs. Temperature Figure 12. VREF vs. Temperature Figure 11. © 2011 Fairchild Semiconductor Corporation FAN4800AU/CU • Rev. 1.0.2 Figure 8. VDD-OVP vs. Temperature FAN4800AU/CU — PFC/ PWM Controller Combination Typical Characteristics www.fairchildsemi.
PAGE 11
Figure 13. GmV vs. Temperature Figure 14. GmI vs. Temperature Figure 15. VPFC-ILIMIT vs. Temperature Figure 16. VPWM-ILIMIT vs. Temperature Figure 17. VRMS-UVP vs. Temperature Figure 18. ΔVRMS-UVP vs. Temperature © 2011 Fairchild Semiconductor Corporation FAN4800AU/CU • Rev. 1.0.2 FAN4800AU/CU — PFC/ PWM Controller Combination Typical Characteristics www.fairchildsemi.
PAGE 12
Figure 19. VGATE-CLAMP-PFC vs. Temperature Figure 21. Figure 20. DPFC-MAX vs. Temperature Figure 23. ISS vs. Temperature © 2011 Fairchild Semiconductor Corporation FAN4800AU/CU • Rev. 1.0.2 VGATE-CLAMP-PWM vs. Temperature Figure 22. DPWM-MAX vs. Temperature Figure 24. VRMS-SAG vs. Temperature FAN4800AU/CU — PFC/ PWM Controller Combination Typical Characteristics www.fairchildsemi.
PAGE 13
Oscillator The internal oscillator frequency is determined by the timing resistor and capacitor on the RT/CT pins as shown in Figure 25. The frequency of the internal oscillator is given: f OSC  (1) Because the PWM stage generally uses a forward converter, it is necessary to limit the maximum duty cycle at 50%. To have a small tolerance of the maximum duty cycle, a frequency divider with toggle flip-flops is used, as illustrated in Figure 25.
PAGE 14
The rectified sinusoidal signal is obtained by the current flowing into the IAC pin. The resistor RIAC should be large enough to prevent saturation of the gain modulator, calculating as: 1 VRMS 2 7.94 2VLINE RIAC MIN  G MAX  140A (3) where VLINEMIN is the line voltage that trips brownout protection, GMAX is the maximum modulator gain when VRMS is 1.08 V (which can be found in the datasheet), and 140 µA is the maximum output current of the gain modulator.
PAGE 15
The voltage-control loop regulates PFC output voltage using an internal error amplifier such that the FB voltage is the same as the internal reference of 2.5 V. Brownout Protection No voltage error amplifier is included in the PWM stage, as this function is generally performed by KA431, in the secondary side. To facilitate the design of opto-coupler feedback circuitry, an offset voltage is built into the inverting input of PWM comparator.
PAGE 16
VFBPFC FAN4800AU/CU is designed such that the operation of PFC part is not perturbed by AC line dropout. Once line voltage disappears, the error amplifier can be saturated, resulting in abnormal current waveforms when the line voltage is recovered if proper preventive measures are not employed. With a limited gain modulator operation, FAN4800AU /CU guarantees stable PFC operation even when AC line is recovered from dropout, as shown in Figure 36. VIN VIN PFC ILIMIT Vo(gm) IL VRMS 33ms VEA 0.
PAGE 17
19.69 18.67 9 16 7.11 6.10 1 8 (0.40) TOP VIEW 0.38 MIN 5.33 MAX 8.25 7.62 1.78 1.14 0.28 0.20 4.95 2.92 3.81 2.92 2.54 0.56 0.36 FAN4800AU/CU — PFC/ PWM Controller Combination Physical Dimensions 10.92 0.25 C SIDE VIEW NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BB B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR PROTRUSIONS D) CONFORMS TO ASME Y14.5M-1994 E) DRAWING FILE NAME: N16EREV2 Figure 39.
PAGE 18
FAN4800AU/CU — PFC/ PWM Controller Combination Physical Dimensions Figure 40. 16-Pin, Small-Outline Integrated Circuit (SOIC), JEDEC MS-012, .150", Narrow Body Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 19
FAN4800AU/CU — PFC/ PWM Controller Combination © 2011 Fairchild Semiconductor Corporation FAN4800AU/CU • Rev. 1.0.2 www.fairchildsemi.