Datasheet

9
ADCS7476 , ADCS7477 , ADCS7478
www.ti.com SNAS192G –APRIL 2003–REVISED MAY 2016
Product Folder Links: ADCS7476 ADCS7477 ADCS7478
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Electrical Characteristics – ADCS7478 (continued)
T
A
= 25°C, V
DD
= 2.7 V to 5.25 V, f
SCLK
= 20 MHz, and f
SAMPLE
= 1 MSPS (unless otherwise noted)
(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
P
D
Power consumption,
normal mode (operational)
V
DD
= 5 V,
f
SAMPLE
= 1 MSPS
T
A
= 25°C 10
mW
–40°C ≤ T
A
≤ 85°C 17.5
V
DD
= 3 V,
f
SAMPLE
= 1 MSPS
T
A
= 25°C 2
mW
–40°C ≤ T
A
≤ 85°C 4.8
Power consumption,
shutdown mode
V
DD
= 5 V, SCLK Off 2.5
µW
V
DD
= 3 V, SCLK Off 1.5
ANALOG INPUT CHARACTERISTICS
V
IN
Input range 0 to V
DD
V
I
DCL
DC leakage current –40°C ≤ T
A
≤ 85°C ±1 µA
C
INA
Analog input capacitance 30 pF
DIGITAL INPUT CHARACTERISTICS
V
IH
Input high voltage –40°C ≤ T
A
≤ 85°C 2.4 V
V
IL
Input low voltage
V
DD
= 5 V, –40°C ≤ T
A
≤ 85°C 0.8 V
V
DD
= 3 V, –40°C ≤ T
A
≤ 85°C 0.4 V
I
IN
Digital input current V
IN
= 0 V or V
DD
T
A
= 25°C ±10 nA
–40°C ≤ T
A
≤ 85°C ±1 µA
C
IND
Input capacitance
T
A
= 25°C 2
p
–40°C ≤ T
A
≤ 85°C 4
DIGITAL OUTPUT CHARACTERISTICS
V
OH
Output high voltage
I
SOURCE
= 200 µA, V
DD
= 2.7 V to 5.25 V,
–40°C ≤ T
A
≤ 85°C
V
DD
− 0.2 V
V
OL
Output low voltage I
SINK
= 200 µA, –40°C ≤ T
A
≤ 85°C 0.4 V
I
OL
TRI-STATE leakage current –40°C ≤ T
A
≤ 85°C ±10 µA
C
OUT
TRI-STATE output capacitance 2 4 pF
Output coding Straight (natural) binary
AC ELECTRICAL CHARACTERISTICS
f
SCLK
Clock frequency –40°C ≤ T
A
≤ 85°C 20 MHz
DC SCLK duty cycle –40°C ≤ T
A
≤ 85°C 40% 60%
t
TH
Track or hold acquisition time –40°C ≤ T
A
≤ 85°C 400 ns
f
RATE
Throughput rate –40°C ≤ T
A
≤ 85°C (see Application Information) 1 MSPS
t
AD
Aperture delay 3 ns
t
AJ
Aperture jitter 30 ps
(1) All input signals are specified as t
r
= t
f
= 5 ns (10% to 90% V
DD
) and timed from 1.6 V.
(2) Minimum quiet time required between bus relinquish and start of next conversion.
(3) Measured with the load circuit (Figure 1), and defined as the time taken by the output to cross 1 V.
6.8 Timing Requirements
–40°C ≤ T
A
≤ 85°C, V
DD
= 2.7 V to 5.25 V, and f
SCLK
= 20 MHz (unless otherwise noted)
(1)
PARAMETER CONDITIONS MIN TYP MAX UNIT
t
CONVERT
T
A
= 25°C 16 × t
SCLK
t
QUIET
Quiet time
(2)
50 ns
t
1
Minimum CS pulse width 10 ns
t
2
CS to SCLK setup time 10 ns
t
3
Delay from CS until SDATA TRI-STATE
disabled
(3)
20 ns