Owner's manual

1300 Henley Court

Pullman, WA 99163

509.334.6306

www.digilentinc.com

PmodALS™ Reference Manual

Revised January, 21 2015

This manual applies to the PmodALS rev. A

DOC#: 502-286

Other product and company names mentioned may be trademarks of their respective owners.

Page 1 of 2

Overview

The Digilent PmodALS demonstrates light-to-digital sensing through a single ambient light sensor. Digilent

engineers designed this Pmod around the Texas Instrument's ADC081S021 analog-to-digital converter and the

Vishay Semiconductor's TEMT6000X01.

1 Functional Description

The PmodALS utilizes a single ambient light sensor (ALS) for user input. The amount of light the ALS is exposed to

determines the voltage level passed into the ADC, which converts it to 8 bits of data. A value of 0 indicates a low

light level and a value of 255 indicates a high light level.

2 Interfacing with the Pmod

The PmodALS communicates with the host board via the SPI protocol. Since the on-board analog-to-digital

converter is a read-only module, the only wires in the SPI protocol that are required are the Chip Select, Master-In-

Slave-Out, and Serial Clock lines. The location of each of these lines on the Pmod header are shown in the table

below.

The PmodALS.

 3-wire SPI™ communication interface

 8-bit resolution

Features include:

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300 Henley Court Pullman, WA 99163 509.334.6306 www.digilentinc.com PmodALS™ Reference Manual Revised January, 21 2015 This manual applies to the PmodALS rev. A Overview The Digilent PmodALS demonstrates light-to-digital sensing through a single ambient light sensor. Digilent engineers designed this Pmod around the Texas Instrument's ADC081S021 analog-to-digital converter and the Vishay Semiconductor's TEMT6000X01. Features include:   3-wire SPI™ communication interface 8-bit resolution The PmodALS.
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PmodALS™ Reference Manual Pin Signal Description 1 CS Chip Select 2 NC Not Connected 3 SDO Master-In-Slave-Out 4 SCK Serial Clock 5 GND Power Supply Ground 6 VCC Power Supply Table 1. Connector J1- Pin Descriptions as labeled on the Pmod. The PmodALS reports to the host board when the ADC081S021 is placed in normal mode by bringing the CS pin low, and delivers a single reading in 16 SCLK clock cycles. The PmodALS requires the frequency of the SCLK to be between 1 MHz and 4 MHz.