^1 HARDWARE REFERENCE MANUAL PMAC2A-PC/104 CPU ^3 PMAC2A-PC/104 CPU Hardware Reference ^4 4xx-603670-xAxx ^5 July 29, 2008 Single Source Machine Control Power // Flexibility // Ease of Use 21314 Lassen Street Chatsworth, CA 91311 // Tel. (818) 998-2095 Fax. (818) 998-7807 // www.deltatau.
Copyright Information © 2008 Delta Tau Data Systems, Inc. All rights reserved. This document is furnished for the customers of Delta Tau Data Systems, Inc. Other uses are unauthorized without written permission of Delta Tau Data Systems, Inc. Information contained in this manual may be updated from time-to-time due to product improvements, etc., and may not conform in every respect to former issues. To report errors or inconsistencies, call or email: Delta Tau Data Systems, Inc.
REVISION HISTORY REV. 1 DESCRIPTION UPDATED JUMPER DESCRIPTIONS PGS. 6 & 30 DATE CHG APPVD 05/17/06 CP S. MILICI 2 REVS: J4, E20-23, CONNECTOR PINOUTS, & BOARD DIAGRAMS 10/04/06 CP P. SHANTZ 3 CORRECTED TYPO IN I-VARIABLE SETTINGS, P. 17 01/22/08 CP S.MILICI 4 CORRECTED USER FLAGS FOR PINS 25 & 26, P.36 07/29/08 CP C.
PMAC2A PC104 Hardware Reference Manual Table of Contents INTRODUCTION .......................................................................................................................................................1 Board Configuration..................................................................................................................................................1 Base Version ............................................................................................................
PMAC2A PC104 Hardware Reference Manual Effects of Changing I900 on the System .............................................................................................................18 How does changing I900 effect other settings in PMAC ....................................................................................20 Effects of Output Resolution and Servo Interrupt Frequency on Servo Gains....................................................21 Using Flag I/O as General-Purpose I/O.................
PMAC2A PC104 Hardware Reference Manual INTRODUCTION The PMAC2A PC/104 motion controller is a compact, cost-effective version of Delta Tau’s PMAC2 family of controllers. The PMAC2A PC/104 can be composed of three boards in a stack configuration. The CPU provides four channels of either DAC ±10V or pulse and direction command outputs. The optional axis expansion board provides a set of four additional servo channels and I/O ports.
PMAC2A PC104 Hardware Reference Manual Option 10: Firmware Version Specification Normally the PMAC2A PC/104 is provided with the newest released firmware version. A label on the memory IC shows the firmware version loaded at the factory. Option 10 provides for a user-specified firmware version. Option 12: Analog-to-Digital Converters Option 12 permits the installation of two channels of on-board analog-to-digital converters with ±10V input range and 12-bits resolution.
PMAC2A PC104 Hardware Reference Manual for PC/104-bus communications, PMAC2A PC/104 Option-2A must be ordered. The key component installed with this option is U17. USB/Ethernet and PC/104 bus communications cannot be made simultaneously it is jumper selectable. Acc-2P Option 3: I/O Ports Option 3 provides the following ports on the Acc-2P communications board for digital I/O connections. • Multiplexer Port: this connector provides eight input lines and eight output lines at TTL levels.
PMAC2A PC104 Hardware Reference Manual 4 Introduction
PMAC2A PC104 Hardware Reference Manual HARDWARE SETUP On the PMAC2 PC/104 CPU, there are a number of jumpers called E-points or W-points. That customize the hardware features of the CPU for a given application and must be setup appropriately. The following is an overview grouped in appropriate categories. For an itemized description of the jumper setup configuration, refer to the E-Point Descriptions section.
PMAC2A PC104 Hardware Reference Manual CPU Configuration Jumpers E15A-E15C: Flash Memory Bank Select Jumpers – The flash-memory IC in location U10 on the PMAC2A PC/104 base board has the capacity for eight separate banks of firmware, only one of which can be used at any given time. The eight combinations of settings for jumpers E15A, E15B, and E15C select which bank of the flash memory is used.
PMAC2A PC104 Hardware Reference Manual Connect pin 1 to 2 to tie differential line to +2.5V • Tie to +2.5V when no connection • Tie to +2.
PMAC2A PC104 Hardware Reference Manual 8 Hardware Setup
PMAC2A PC104 Hardware Reference Manual MACHINE CONNECTIONS Typically, the user connections are made to terminal blocks that attach to the JMACH connectors by a flat cable.
PMAC2A PC104 Hardware Reference Manual • supply, or the two supplies will fight each other, possibly causing damage. This voltage could be measured on the TB1 terminal block. In a stand-alone configuration, when PMAC is not plugged in a computer bus, it will need an external ±12V supply only when the digital-to-analog converter (DAC) outputs are used. The ±12V lines from the supply, including the ground reference, can be brought in either from the TB1 terminal block or from the JMACH1 connector.
PMAC2A PC104 Hardware Reference Manual Example: differential quadrature encoder connected to channel #1: DAC Output Signals If PMAC is not performing the commutation for the motor, only one analog output channel is required to command the motor. This output channel can be either single-ended or differential, depending on what the amplifier is expecting. For a single-ended command using PMAC channel 1, connect DAC1+ (pin 29) to the command input on the amplifier.
PMAC2A PC104 Hardware Reference Manual Amplifier Fault Signal (FAULT-) This input can take a signal from the amplifier so PMAC knows when the amplifier is having problems, and can shut down action. The polarity is programmable with I-variable Ix25 (I125 for motor 1) and the return signal is ground (GND). FAULT1- is pin 35. With the default setup, this signal must actively be pulled low for a fault condition.
PMAC2A PC104 Hardware Reference Manual If a cable needs to be made, the easiest approach is to use a flat cable prepared with flat-cable type connectors as indicated in the following diagram: DB-9 Female 1 DB-9 Male 1 PMAC (DB-9S) PC (DB-9) 1 (No connect) 2 (TXD/) 3 (RXD/) 4 (DSR) 5 (Gnd) 6 (DTR) 7 (CTS) 8 (RTS) 9 (No connect) 1 (No connect) 2 (RXD) 3 (TXD) 4 (DTR) 5 (Gnd) 6 (DSR) 7 (RTS) 8 (CTS) 9 (No connect) Machine Connections Example: Using Analog ±10V Amplifier Machine Connections 13
PMAC2A PC104 Hardware Reference Manual Machine Connections Example: Using Pulse and Direction Drivers 14 Machine Connections
PMAC2A PC104 Hardware Reference Manual SOFTWARE SETUP Note: The PMAC2A PC/104 requires the use of V1.17 or newer firmware. There are few differences between the previous V1.16H firmware and the V1.17 firmware other than the addition of internal support for the Flex CPU design. PMAC I-Variables PMAC has a large set of Initialization parameters (I-variables) that determine the "personality" of the card for a specific application. Many of these are used to configure a motor properly.
PMAC2A PC104 Hardware Reference Manual If the CPU’s operational frequency has been determined by (a non-zero setting of) I46, the serial communications baud rate is determined at power-up/reset by variable I54 alone according to the following table: I54 Baud Rate I54 Baud Rate 0 1 2 3 4 5 6 7 600 900 1200 1800 2400 3600 4800 7200 8 9 10 11 12 13 14 15 9600 14,400 19,200 28,800 38,400 57,600 76,800 115,200 For a saved value of 0 for I46, the serial baud rate is determined by the combination of I54 a
PMAC2A PC104 Hardware Reference Manual Since the PMAC2PC104 uses standard PMAC2 firmware the following I-variables must be set properly to use the digital-to-analog (filtered DAC) outputs: I900 I901 I902 I903 I906 I907 I9n6 Ix69 I10 = = = = = = = = = 1001 5 3 1746 1001 1746 0 1001 3421867 ; ; ; ; ; ; ; ; ; PWM frequency 29.4kHz, PWM 1-4 Phase Clock 9.8059kHz Servo frequency 2.451kHz ADC frequency PWM frequency 29.
PMAC2A PC104 Hardware Reference Manual I903 I903 determines the frequency of four hardware clock signals used for machine interface channels 1-4; This can be left at the default value (I903=*). The four hardware clock signals are SCLK (encoder sample clock), PFM_CLK (pulse frequency modulator clock), DAC_CLK (digital-to-analog converter clock), and ADC_CLK (analog-to-digital converter clock).
PMAC2A PC104 Hardware Reference Manual By increasing I900 we are essentially decreasing our PWM Frequency. The two are related by the following equation: I900 = INT[117,964.8/(4*PWMFreq(KHz)) - 1] Passing the PWM signal through a 10KHz low pass filter creates the +/-10V signal output. The duty cycle of the PWM signal is what generates the magnitude the voltage output. The frequency of the PWM signal determines the magnitude and frequency of ripple on that +/-10V signal.
PMAC2A PC104 Hardware Reference Manual How does changing I900 effect other settings in PMAC I900 is does not only set the PWM frequency for the PWM outputs but it also sets the Max Phase Frequency. MaxPhase Frequency = 117,964.8 kHz / [2*I900+3] PWM Frequency = 117,964.8 kHz / [4*I900+6] The Max Phase Frequency is then divided by I901 to generate the frequency for the phase interrupt and its routines. If you change I900 you have to change I901 to keep the same phase interrupt.
PMAC2A PC104 Hardware Reference Manual interrupt frequencies for better servo performance, but our default frequencies are typically more than fast enough for many applications. We will discuss tuning parameter a bit later in this document. I901= 29.44KHz/19.61KHz -1 = @0.5 set it at 1 or 14.72KHz This is not exactly the same since I901 is an integer value but pretty close. Since we are doing any commutation with a +/-10V signal it doesn’t make that much of a difference.
PMAC2A PC104 Hardware Reference Manual Using Flag I/O as General-Purpose I/O Either the user flags or other not assigned axes flag on the base board can be used as general-purpose I/O for up to 20 inputs and 4 outputs at 5-24Vdc levels.
PMAC2A PC104 Hardware Reference Manual HARDWARE REFERENCE SUMMARY The following information is based on the PMAC2A PC/104 board, part number 603670-100.
PMAC2A PC104 Hardware Reference Manual From v107 to 108 W1 removed: 24 Hardware Reference Summary
PMAC2A PC104 Hardware Reference Manual From v108 to 109 E20 in same location but rotated 90 degrees: Hardware Reference Summary 25
PMAC2A PC104 Hardware Reference Manual Board Layout 1 2 3 4 5 6 A 26 B C D E F Feature Location Feature Location Feature Location E0 E1 E2 E3 E4 E8 E9 E10 E11 E12 B3 B4 B4 C4 C4 B1 B1 E5 E5 E5 E13 E14 E15A E15B E15C E16 E18 E19 W1 E5 B3 E4 E4 E4 D1 D4 D4 E6 RP30 RP31 RP36 RP37 D1 D2 TB1 JRS232 JMACH1 JMACH2 E2 E2 E3 E3 A2 A3 B6 A2 F3 A4 Hardware Reference Summary
PMAC2A PC104 Hardware Reference Manual Connectors and Indicators J3 - Machine Connector (JMACH1 Port) The primary machine interface connector is JMACH1, labeled J3 on the PMAC. It contains the pins for four channels of machine I/O: analog outputs, incremental encoder inputs, amplifier fault and enable signals and power-supply connections. 1. 50-pin female flat cable connector T&B Ansley P/N 609-5041 2. Standard flat cable stranded 50-wire T&B Ansley P/N 171-50 3.
PMAC2A PC104 Hardware Reference Manual 28 Hardware Reference Summary
PMAC2A PC104 Hardware Reference Manual E-POINT JUMPER DESCRIPTIONS E0: Forced Reset Control E Point and Physical Layout Location Description E0 B3 Factory use only; the board will not operate with E0 installed. Default No jumper E1: Servo and Phase Clock Direction Control E Point and Physical Layout Location Description B4 Remove jumper for PMAC to use its internally generated servo and phase clock signals and to output these signals on the J8 serial port connector.
PMAC2A PC104 Hardware Reference Manual E4: CPU Frequency Select E Point and Physical Layout E4 Location Description Default C4 Remove jumper for 40 MHz operation (E2 OFF also) or for 60 MHz operation (E4 ON). Jump pin 1 to 2 for 80 MHz operation (E2 OFF).
PMAC2A PC104 Hardware Reference Manual E13: Power-Up/Reset Load Source E Point and Physical Layout Location Description E13 E5 Jump pin 1 to 2 to reload firmware through serial or bus port. Remove jumper for normal operation. Default No jumper E14: Watchdog Disable Jumper E Point and Physical Layout Location Description E14 B3 Jump pin 1 to 2 to disable Watchdog timer (for test purposes only). Remove jumper to enable Watchdog timer.
PMAC2A PC104 Hardware Reference Manual E18 – E19: PC/104 Bus Address E Point and Physical Layout Location Description Default D4 Jumpers E18 and E19 select the PC/104 bus address for communications according to the following table: No E18 jumper installed; Jumper E19 installed E18 E19 E18 E19 Address (Hex) Address (Dec) OFF OFF $200 512 OFF ON $210 528 ON OFF $220 544 ON ON $230 560 Note: Jumper E18 must be removed and jumper E19 must be installed for using either the Ethernet
PMAC2A PC104 Hardware Reference Manual CONNECTOR PINOUTS TB1 (JPWR): Power Supply (4-Pin Terminal Block) Top View Pin# Symbol Function Description Notes 1 GND Common Digital Common 2 +5V Input Logic Voltage Supplies all PMAC digital circuits 3 +12V Input DAC Supply Voltage Ref to Digital GND 4 -12V Input DAC Supply Voltage Ref to Digital GND This terminal block can be used to provide the input for the power supply for the circuits on the PMAC board when it is not in a bus configuration.
PMAC2A PC104 Hardware Reference Manual J3 (JMACH1): Machine Port Connector (50-Pin Header) Top View 34 Pin# Symbol Function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 +5V +5V GND GND CHA1 CHA2 CHA1/ CHA2/ CHB1 CHB2 CHB1/ CHB2/ CHC1 CHC2 CHC1/ CHC2/ CHA3 CHA4 CHA3/ CHA4/ CHB3 CHB4 CHB3/ CHB4/ CHC3 CHC4 CHC3/ CHC4/ DAC1 DAC2 DAC1/ DAC2/ AENA1/ AENA2/ FAULT1/ FAULT2/ DAC3 DAC4 DAC3/ Output Output Common Common Input Input Input Input Inpu
PMAC2A PC104 Hardware Reference Manual J3 JMACH1 (50-Pin Header) (Continued) Top View Pin# Symbol Function Description Notes 40 DAC4/ Output Analog Output Negative 4 4,5 41 AENA3/ Output Amplifier -Enable 3 42 AENA4/ Output Amplifier -Enable 4 43 FAULT3/ Input Amplifier -Fault 3 6 44 FAULT4/ Input Amplifier -Fault 4 6 45 ADCIN_1 Input Analog Input 1 Option-12 required 46 ADCIN_2 Input Analog Input 2 Option-12 required 47 FLT_FLG_V Input Amplifier Fault pull-up V+ 48 GND Common Digital Common 49 +12V
PMAC2A PC104 Hardware Reference Manual J4 (JMACH2): Machine Port CPU Connector (34-Pin Header) Pin# Symbol Function Description Front View Notes 1 FLG_1_2_V Input Flags 1-2 Pull-Up 2 FLG_3_4_V Input Flags 3-4 Pull-Up 3 GND Common Digital Common 4 GND Common Digital Common 5 HOME1 Input Home-Flag 1 10 6 HOME2 Input Home-Flag 2 10 7 PLIM1 Input Positive End Limit 1 8,9 8 PLIM2 Input Positive End Limit 2 8,9 9 MLIM1 Input Negative End Limit 1 8,9 10 MLIM2 Input Negative End Limit 2 8,9 11 USER1 Input Use
PMAC2A PC104 Hardware Reference Manual Connector Pinouts 37
PMAC2A PC104 Hardware Reference Manual SCHEMATICS 38 Connector Pinouts
PMAC2A PC104 Hardware Reference Manual BA08_A BA09_A BA08_A BA09_A BA10_A BA11_A BA10_A BA11_A BX/Y_A BX/Y_A R1 19.6608Mhz 10 C87 .1UF 19.6608Mhz BH2 BH3 +5V OR BH4 BH5 BH6 BH7 A6 A7 C15 10UF 16V (TANT) VR1 LM1117MPX-3.3 MC33269ST-3.3 3 IN OUT GND +3P3V + (SOT-223) GND X/Y EXTAL C16 10UF 16V (TANT) 1 C88 RP3 .1UF 10 1 +5V RP4 GND +3P3V +5V RP7 10 1 10 1 10 3.
PMAC2A PC104 Hardware Reference Manual BD00_A BD02_A BD04_A BD06_A BD08_A BD10_A BD12_A BD14_A BA00_A BA02_A BA04_A BA06_A BA08_A BA10_A BA12_A BX/Y_A (JEXP_A) J11 BD00_A BD02_A BD04_A BD06_A BD08_A BD10_A BD12_A BD14_A BD16_A BD18_A BD20_A BD22_A BA00_A BA02_A BA04_A BA06_A BA08_A BA10_A BA12_A BX/Y_A 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 PWM~A~T1 PWM_B_T1 PWM_B_B1 PWM_B_T2 PWM_B_B2 PWM_B_T3 PWM_B_B3 PWM_B_T4 PWM_B_B4 ADC_A1 ADC_A2 ADC_A3 ADC_A4 ADC_B1 ADC_B2 ADC_B3 ADC_B4 ADC_STR F
